On Wed, Jun 26, 2013 at 05:07:02PM -0400, Waiman Long wrote:On 06/26/2013 04:17 PM, Andi Kleen wrote:I mean i386, as in the 32bit x86 architecture.Do you mean the original i386 or the i586 that are now used by most+ * The combined data structure is 8-byte aligned. So proper placement of thisOn i386 u64 is only 4 bytes aligned. So you need to explicitely align
+ * structure in the larger embedding data structure is needed to ensure that
+ * there is no hole in it.
it to 8 bytes. Otherwise you risk the two members crossing a cache line, which
would be really expensive with atomics.
distribution now? If it is the former, I recall that i386 is now no
longer supported.
I also look around some existing codes that use cmpxchg64. ItAdding the alignment is basically free. If 32bit users don't enforce
doesn't seem like they use explicit alignment. I will need more
investigation to see if it is a real problem.
it they're likely potentially broken yes, but they may be lucky.
But this isn't a cheap check. Especially spin_unlock_wait can beAn unconditional CMPXCHG can be as bad as acquiring the spinlock. So+ get_lock = ((threshold>= 0)&& (old.count == threshold));What is that for? Why can't you do the CMPXCHG unconditially ?
+ if (likely(!get_lock&& spin_can_lock(&old.lock))) {
we need to check the conditions are ready before doing an actual
CMPXCHG.
very expensive.
And all these functions have weird semantics. Perhaps just a quick
spin_is_locked.