On 08/07/2013 06:53 AM, Fabian Vogt wrote:We don't know, it's a relableled chip withThis driver supports the GPIO controller found in LSI ZEVIO SoCs.
It has been successfully tested on a TI nspire CX calculator.
diff --git a/Documentation/devicetree/bindings/gpio/gpio-zevio.txt b/Documentation/devicetree/bindings/gpio/gpio-zevio.txt
+Zevio GPIO controller
+
+Required properties:
+- compatible = "lsi,zevio-gpio"
Is there only one zevio chip, or a series? Is "zevio" the full name of
the chip, including any version number?
I added it just for someone who maybe needs it. It's only two lines and maybe+- reg = <BASEADDR SIZE>
+- #gpio-cells = <2>
+- gpio-controller;
+
+Optional:
+- #ngpios = <32>: Number of GPIOs. Defaults to 32 if absent
Perhaps one can derive that from the compatible value? The fact this
property exists implies there's more than one zevio chip, so perhaps
each should have an explicit compatible value described above?
Is the GPIO block not also an interrupt source/controller? I see theI forgot to remove this line after testing the interrupts, the tests went horribly (hard lockups)...
following in the patch, and references to some IRQ registers...
+ select GENERIC_IRQ_CHIP