On 07/19/2013 12:49 PM, Roger Quadros wrote:On 07/19/2013 01:36 PM, Arend van Spriel wrote:On 07/18/2013 10:59 AM, Tony Lindgren wrote:Then for the SDIO with device tree, take a look at the following
patches:
[PATCH 0/3] WLAN support for omap4 when booted with devicetree
http://comments.gmane.org/gmane.linux.ports.arm.omap/97522#
I have been looking at the pandaboard patch in the series above and I
do have a question. Among other things the patch adds these dt entries.
+ 0x108 0x118 /* sdmmc5_clk.sdmmc5_clk INPUT_PULLUP |
MODE0 */
+ 0x10a 0x118 /* sdmmc5_cmd.sdmmc5_cmd INPUT_PULLUP |
MODE0 */
If I look at the similar names in the deceased board-omap4panda.c:
board-omap4panda.c: OMAP4_MUX(SDMMC5_CMD, OMAP_MUX_MODE0 |
OMAP_PIN_INPUT_PULLUP),
board-omap4panda.c: OMAP4_MUX(SDMMC5_CLK, OMAP_MUX_MODE0 |
OMAP_PIN_INPUT_PULLUP),
and in mux44xx.h:
mux44xx.h:#define OMAP4_CTRL_MODULE_PAD_SDMMC5_CLK_OFFSET 0x0148
mux44xx.h:#define OMAP4_CTRL_MODULE_PAD_SDMMC5_CMD_OFFSET 0x014a
So how did 0x0148 get 0x0108 in DT and 0x014a get 0x010a. There is
probably an explanation to it and it would help my understanding to
know where this difference comes from. Hope you can help me out here.
If you see omap4.dtsi, omap4_pmx_core starts at register address
0x4a100040.
So, you need to subtract 0x40 from the offsets defined in mux44xx.h
for pmx_core registers.
That was what I was looking for. Thanks!
NOTE: omap4_pmx_wkup starts at a different address. Those are for
wakeup domain
control registers.
Will keep that in mind.
Regards,
Arend