Re: [PATCH 2/3] x86: mm: Change tlb_flushall_shift for IvyBridge

[Peter Zijlstra]

On Mon, Dec 16, 2013 at 04:26:31PM +0800, Alex Shi wrote:
> On 12/14/2013 10:19 PM, Peter Zijlstra wrote:
> > On Fri, Dec 13, 2013 at 10:11:05AM +0800, Alex Shi wrote:
> >> BTW,
> >> A bewitching idea is till attracting me.
> >> https://lkml.org/lkml/2012/5/23/148
> >> Even it was sentenced to death by HPA.
> >> https://lkml.org/lkml/2012/5/24/143
> >>
> >> That is that just flush one of thread TLB is enough for SMT/HT, seems
> >> TLB is still shared in core on Intel CPU. This benefit is unconditional,
> >> and if my memory right, Kbuild testing can improve about 1~2% in average
> >> level.
> >>
> >> So could you like to accept some ugly quirks to do this lazy TLB flush
> >> on known working CPU?
> >> Forgive me if it's stupid.
> > 
> > I think there's a further problem with that patch -- aside of it being
> > right from a hardware point of view.
> > 
> > We currently rely on the tlb flush IPI to synchronize with lockless page
> > table walkers like gup_fast().
> 
> I am sorry if I miss sth. :)
> 
> But if my understand correct, in the example of gup_fast, wait_split_huge_page
> will never goes to BUG_ON(). Since the flush TLB IPI still be sent out to clear
> each of _PAGE_SPLITTING on each CPU core. This patch just stop repeat TLB flush
> in another SMT on same core. If there only noe SMT affected, the flush still be 
> executed on it.

This has nothing what so ff'ing ever to do with huge pages.


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