Re: [PATCH v7 1/4] qrwlock: A queue read/write lock implementation

[Paul E. McKenney]

On Tue, Dec 17, 2013 at 11:27:29AM -0800, Linus Torvalds wrote:
> On Tue, Dec 17, 2013 at 11:21 AM, Paul E. McKenney
> <paulmck@xxxxxxxxxxxxxxxxxx> wrote:
> >
> > Looks like xadd() is x86-specific, but this is common code.  One
> > approach would be to do xadd() for other arches, another approach
> > would be to make .rw be an atomic_t rather than a u32.  Making it
> > be atomic_t is probably easiest.  (The cmpxchg()s would then need
> > to be atomic_cmpxchg().)
> 
> Note that "xadd()" has different semantics from "atomic_add_return()".

Gah, that one always trips me up.  :-/

> xadd() returns the original value, while atomic_add_return() returns
> the result of the addition.
> 
> In this case, we seem to want the xadd() semantics. I guess we can use
> "atomic_add_return(val,&atomic)-val" and just assume that the compiler
> gets it right (with the addition and the subtraction cancelling out).

That seems like it would work well.

> Or maybe we should have a "atomic_add_return_original()" with xadd
> semantics?

My lazy side prefers the autocancellation.  ;-)  But yes, there are a
number of architectures (including ARM and Power) where the compiler
would have to be very tricky to reach into an asm to do the cancellation.

So perhaps a generic atomic_add_return_original() that is defined in
terms of atomic_add_return() as you say above, allowing architectures
to override with more-efficient implementations?  The same could be done
for add_smp() and xadd(), for that matter.

							Thanx, Paul

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