[PATCH] arch: metag: lib: add "umoddi3.S" file for __umoddi3()

From: Chen Gang
Date: Thu Dec 19 2013 - 07:05:51 EST

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Use objdump to get "umoddi3.S" for __umoddi3(), the original binary
file is "gcc-4.2.4-final/gcc/libgcc/umoddi3.o" which is generated by
"gcc-4.2.4/gcc/libgcc2.c".

The relate error with allmodconfig:

MODPOST 2909 modules
ERROR: "__umoddi3" [drivers/target/target_core_mod.ko] undefined!

Signed-off-by: Chen Gang <gang.chen.5i5j@xxxxxxxxx>
---
arch/metag/kernel/metag_ksyms.c | 1 +
arch/metag/lib/Makefile | 1 +
arch/metag/lib/umoddi3.S | 367 ++++++++++++++++++++++++++++++++++++++++
3 files changed, 369 insertions(+)
create mode 100644 arch/metag/lib/umoddi3.S

diff --git a/arch/metag/kernel/metag_ksyms.c b/arch/metag/kernel/metag_ksyms.c
index 215c94a..545eb1f 100644
--- a/arch/metag/kernel/metag_ksyms.c
+++ b/arch/metag/kernel/metag_ksyms.c
@@ -39,6 +39,7 @@ DECLARE_EXPORT(__modsi3);
DECLARE_EXPORT(__muldi3);
DECLARE_EXPORT(__cmpdi2);
DECLARE_EXPORT(__ucmpdi2);
+DECLARE_EXPORT(__umoddi3);

/* Maths functions */
EXPORT_SYMBOL(div_u64);
diff --git a/arch/metag/lib/Makefile b/arch/metag/lib/Makefile
index a41d24e..ae5cb41 100644
--- a/arch/metag/lib/Makefile
+++ b/arch/metag/lib/Makefile
@@ -20,3 +20,4 @@ lib-y += cmpdi2.o
lib-y += ucmpdi2.o
lib-y += ip_fast_csum.o
lib-y += checksum.o
+lib-y += umoddi3.o
diff --git a/arch/metag/lib/umoddi3.S b/arch/metag/lib/umoddi3.S
new file mode 100644
index 0000000..399b27b
--- /dev/null
+++ b/arch/metag/lib/umoddi3.S
@@ -0,0 +1,367 @@
+ .text
+ .global ___umoddi3
+ .type ___umoddi3,function
+ .align 2
+___umoddi3:
+ MSETL [A0StP++],D0FrT,D0.5,D0.6,D0.7
+ SETL [A0StP++],A0FrP,A1LbP
+ ADDT A1LbP,CPC1,#0
+ ADD A1LbP,A1LbP,#0
+ ADD A0StP,A0StP,#0x20
+ MOV D0.5,D0Ar4
+ ADDS D1.5,D1Ar3,#0
+ MOV D0Ar4,#0
+ MOV D1Ar3,#0
+ SETL [A0StP+#-8],D0Ar4,D1Ar3
+ MOV D0.6,D0.5
+ MOV D1.7,D0Ar2
+ MOV D1.6,D1Ar1
+ BNE $2a8
+ CMP D0.5,D1Ar1
+ BLS $c0
+ CMP D0.5,#0xffff
+ BHI $58
+ CMP D0.5,#0xff
+ MOV D1Ar3,#0x8
+ MOVLS D1Ar3,D1.5
+ B $68
+$58:
+ CMPMT D0.5,#0xff
+ MOV D0FrT,#0x10
+ ADDHI D0FrT,D0FrT,#0x8
+ MOV D1Ar3,D0FrT
+$68:
+ MOV D0Ar2,D1Ar3
+ GETD D0Ar4,[A1LbP]
+ LSR D0FrT,D0.6,D0Ar2
+ MOV D0Ar2,#0x20
+ GETB D0FrT,[D0FrT+D0Ar4]
+ SUB D0Ar4,D0Ar2,D1Ar3
+ SUBS D0.7,D0Ar4,D0FrT
+ MOVNE D0Ar4,D1.7
+ SUBNE D0FrT,D0Ar2,D0.7
+ MOVNE D0Ar2,D1.6
+ LSRNE D0FrT,D0Ar4,D0FrT
+ MOVNE D1Ar1,D0.7
+ LSLNE D0Ar4,D0Ar2,D0.7
+ ORNE D1.6,D0FrT,D0Ar4
+ LSLNE D0.6,D0.6,D0.7
+ LSLNE D1.7,D1.7,D1Ar1
+ LSR D1.5,D0.6,#0x10
+ MOV D1Ar1,D1.6
+ MOV D0Ar2,D1.5
+ CALLR D1RtP,___udivsi3
+ MOV D1Ar1,D1.6
+ B $208
+$c0:
+ CMP D0.5,#0
+ BNE $d8
+ MOV D1Ar1,#0x1
+ MOV D0Ar2,D0.5
+ CALLR D1RtP,___udivsi3
+ MOV D0.6,D0Re0
+$d8:
+ CMP D0.6,#0xffff
+ BHI $f0
+ CMP D0.6,#0xff
+ MOV D1Ar3,#0x8
+ MOVLS D1Ar3,D1.5
+ B $100
+$f0:
+ CMPMT D0.6,#0xff
+ MOV D0FrT,#0x10
+ ADDHI D0FrT,D0FrT,#0x8
+ MOV D1Ar3,D0FrT
+$100:
+ MOV D0Ar4,D1Ar3
+ MOV D0Ar2,#0x20
+ LSR D0FrT,D0.6,D0Ar4
+ GETD D0Ar4,[A1LbP]
+ GETB D0FrT,[D0FrT+D0Ar4]
+ SUB D0Ar4,D0Ar2,D1Ar3
+ SUBS D0.7,D0Ar4,D0FrT
+ SUBEQ D0.5,D1.6,D0.6
+ BEQ $1f4
+ SUB D0FrT,D0Ar2,D0.7
+ LSL D0.6,D0.6,D0.7
+ MOV D0Ar2,D1.6
+ LSR D1.5,D0.6,#0x10
+ MOV D0Ar4,D1.7
+ LSR D0.5,D0Ar2,D0FrT
+ MOV D1Ar1,D0.5
+ LSR D0FrT,D0Ar4,D0FrT
+ MOV D1.6,D0.6
+ LSL D0Ar4,D0Ar2,D0.7
+ MOV D0Ar2,D1.5
+ OR D0FrT,D0FrT,D0Ar4
+ SETD [A0StP+#-20],D0FrT
+ AND D1.6,D1.6,#0xffff
+ CALLR D1RtP,___udivsi3
+ MOV D1Ar1,D0.5
+ MOV D0Ar2,D1.5
+ MULD D0.5,D0Re0,D1.6
+ CALLR D1RtP,___umodsi3
+ GETD D0Ar2,[A0StP+#-20]
+ LSL D0Re0,D0Re0,#0x10
+ LSR D0FrT,D0Ar2,#0x10
+ OR D0FrT,D0FrT,D0Re0
+ CMP D0FrT,D0.5
+ BCC $19c
+ ADD D0FrT,D0FrT,D0.6
+ CMP D0FrT,D0.6
+ BCS $19c
+ CMP D0FrT,D0.5
+ ADDCS D0FrT,D0FrT,D0.6
+$19c:
+ SUB D0.5,D0FrT,D0.5
+ MOV D1Ar1,D0.5
+ MOV D0Ar2,D1.5
+ CALLR D1RtP,___udivsi3
+ MOV D1Ar1,D0.5
+ MOV D0Ar2,D1.5
+ MULD D0.5,D0Re0,D1.6
+ CALLR D1RtP,___umodsi3
+ GETD D0FrT,[A0StP+#-20]
+ LSL D0Re0,D0Re0,#0x10
+ AND D0FrT,D0FrT,#0xffff
+ OR D0Re0,D0Re0,D0FrT
+ CMP D0Re0,D0.5
+ BCC $1e8
+ ADD D0Re0,D0Re0,D0.6
+ CMP D0Re0,D0.6
+ BCS $1e8
+ CMP D0Re0,D0.5
+ ADDCS D0Re0,D0Re0,D0.6
+$1e8:
+ MOV D1Ar1,D0.7
+ SUB D0.5,D0Re0,D0.5
+ LSL D1.7,D1.7,D1Ar1
+$1f4:
+ LSR D1.5,D0.6,#0x10
+ MOV D1Ar1,D0.5
+ MOV D0Ar2,D1.5
+ CALLR D1RtP,___udivsi3
+ MOV D1Ar1,D0.5
+$208:
+ MOV D1.6,D0.6
+ MOV D0Ar2,D1.5
+ AND D1.6,D1.6,#0xffff
+ MULD D0.5,D0Re0,D1.6
+ CALLR D1RtP,___umodsi3
+ LSR D0FrT,D1.7,#0x10
+ LSL D0Re0,D0Re0,#0x10
+ OR D0Re0,D0Re0,D0FrT
+ CMP D0Re0,D0.5
+ BCC $244
+ ADD D0Re0,D0Re0,D0.6
+ CMP D0Re0,D0.6
+ BCS $244
+ CMP D0Re0,D0.5
+ ADDCS D0Re0,D0Re0,D0.6
+$244:
+ SUB D0.5,D0Re0,D0.5
+ MOV D1Ar1,D0.5
+ MOV D0Ar2,D1.5
+ CALLR D1RtP,___udivsi3
+ MOV D1Ar1,D0.5
+ MOV D0Ar2,D1.5
+ MULD D0.5,D0Re0,D1.6
+ CALLR D1RtP,___umodsi3
+ MOV D0FrT,D1.7
+ LSL D0Re0,D0Re0,#0x10
+ AND D0FrT,D0FrT,#0xffff
+ OR D0Re0,D0Re0,D0FrT
+ CMP D0Re0,D0.5
+ BCC $290
+ ADD D0Re0,D0Re0,D0.6
+ CMP D0Re0,D0.6
+ BCS $290
+ CMP D0Re0,D0.5
+ ADDCS D0Re0,D0Re0,D0.6
+$290:
+ SUB D0Re0,D0Re0,D0.5
+ LSR D0Re0,D0Re0,D0.7
+ MOV D0FrT,#0
+ SETD [A0StP+#-8],D0Re0
+ SETD [A0StP+#-4],D0FrT
+ B $51c
+$2a8:
+ MOV D0.5,D1.5
+ CMP D0.5,D1Ar1
+ BLS $2c0
+ SETD [A0StP+#-8],D0Ar2
+ SETD [A0StP+#-4],D1Ar1
+ B $51c
+$2c0:
+ CMP D1.5,#0xffff
+ BHI $2d4
+ CMP D1.5,#0xff
+ MOV D0FrT,#0
+ B $2dc
+$2d4:
+ CMPMT D1.5,#0xff
+ MOV D0FrT,#0x10
+$2dc:
+ GETD D0Ar4,[A1LbP]
+ ADDHI D0FrT,D0FrT,#0x8
+ MOV D1Ar3,D0FrT
+ LSR D0FrT,D0.5,D0FrT
+ GETB D0FrT,[D0FrT+D0Ar4]
+ MOV D0Ar2,#0x20
+ SUB D0Ar4,D0Ar2,D1Ar3
+ SUBS D0Ar4,D0Ar4,D0FrT
+ SETD [A0StP+#-32],D0Ar4
+ BNE $33c
+ CMP D1.6,D0.5
+ BHI $314
+ CMP D1.7,D0.6
+ BCS $330
+$314:
+ SUB D1Ar3,D1.7,D0.6
+ CMP D1Ar3,D1.7
+ SUB D0Ar4,D1.6,D0.5
+ MOV D0FrT,#0
+ ADDHI D0FrT,D0FrT,#0x1
+ SUB D1.6,D0Ar4,D0FrT
+ MOV D1.7,D1Ar3
+$330:
+ SETD [A0StP+#-8],D1.7
+ SETD [A0StP+#-4],D1.6
+ B $51c
+$33c:
+ GETD D1Ar3,[A0StP+#-32]
+ SUB D0Ar2,D0Ar2,D1Ar3
+ SETD [A0StP+#-28],D0Ar2
+ MOV D0Ar2,D1Ar3
+ LSL D0Ar4,D0.5,D0Ar2
+ GETD D0Ar2,[A0StP+#-28]
+ LSR D0FrT,D0.6,D0Ar2
+ OR D0.7,D0FrT,D0Ar4
+ MOV D1Ar1,D0Ar2
+ LSL D0Ar4,D1.6,D1Ar3
+ GETD D1Ar3,[A0StP+#-28]
+ LSR D0.5,D1.6,D1Ar1
+ LSR D0FrT,D0.7,#0x10
+ MOV D0Ar2,D0FrT
+ SETD [A0StP+#-16],D0FrT
+ LSR D0FrT,D1.7,D1Ar3
+ MOV D1Ar1,D0.5
+ OR D0FrT,D0FrT,D0Ar4
+ SETD [A0StP+#-24],D0FrT
+ CALLR D1RtP,___udivsi3
+ GETD D0Ar2,[A0StP+#-16]
+ MOV D1Ar1,D0.5
+ MOV D1.6,D0Re0
+ CALLR D1RtP,___umodsi3
+ MOV D0Ar2,D0.7
+ AND D0Ar2,D0Ar2,#0xffff
+ GETD D0Ar4,[A0StP+#-24]
+ MULD D0.5,D0Ar2,D1.6
+ SETD [A0StP+#-12],D0Ar2
+ GETD D0Ar2,[A0StP+#-32]
+ LSL D0Re0,D0Re0,#0x10
+ LSR D0FrT,D0Ar4,#0x10
+ OR D0Re0,D0Re0,D0FrT
+ MOV D1Ar1,D0Ar2
+ CMP D0Re0,D0.5
+ LSL D0.6,D0.6,D0Ar2
+ LSL D1.7,D1.7,D1Ar1
+ BCC $3f0
+ ADD D0Re0,D0Re0,D0.7
+ CMP D0Re0,D0.7
+ SUB D1.6,D1.6,#0x1
+ BCS $3f0
+ CMP D0Re0,D0.5
+ SUBCS D1.6,D1.6,#0x1
+ ADDCS D0Re0,D0Re0,D0.7
+$3f0:
+ SUB D0.5,D0Re0,D0.5
+ GETD D0Ar2,[A0StP+#-16]
+ MOV D1Ar1,D0.5
+ CALLR D1RtP,___udivsi3
+ GETD D0Ar2,[A0StP+#-16]
+ MOV D1Ar1,D0.5
+ MOV D1.5,D0Re0
+ CALLR D1RtP,___umodsi3
+ GETD D0FrT,[A0StP+#-24]
+ GETD D1Ar3,[A0StP+#-12]
+ LSL D0Re0,D0Re0,#0x10
+ AND D0FrT,D0FrT,#0xffff
+ MULD D1Re0,D1Ar3,D1.5
+ OR D1Ar5,D0Re0,D0FrT
+ CMP D1Ar5,D1Re0
+ BCC $44c
+ ADD D1Ar5,D1Ar5,D0.7
+ SUB D1.5,D1.5,#0x1
+ CMP D1Ar5,D0.7
+ BCS $44c
+ CMP D1Ar5,D1Re0
+ SUBCS D1.5,D1.5,#0x1
+ ADDCS D1Ar5,D1Ar5,D0.7
+$44c:
+ LSL D0FrT,D1.6,#0x10
+ MOV D1Ar3,D0.6
+ LSR D0Ar2,D0.6,#0x10
+ OR D0FrT,D1.5,D0FrT
+ AND D1Ar3,D1Ar3,#0xffff
+ LSR D1Ar1,D0FrT,#0x10
+ AND D0FrT,D0FrT,#0xffff
+ MULD D0Ar6,D1Ar1,D1Ar3
+ MULD D1Ar3,D0FrT,D1Ar3
+ MULD D0Ar4,D0FrT,D0Ar2
+ LSR D0FrT,D1Ar3,#0x10
+ ADD D0Ar4,D0Ar6,D0Ar4
+ ADD D0Ar4,D0Ar4,D0FrT
+ CMP D0Ar4,D0Ar6
+ MULD D1Ar1,D1Ar1,D0Ar2
+ SUB D0.5,D1Ar5,D1Re0
+ BCC $494
+ ADDT D1Ar1,D1Ar1,#0x1
+$494:
+ LSR D0FrT,D0Ar4,#0x10
+ ADD D0Ar2,D1Ar1,D0FrT
+ MOV D0FrT,D1Ar3
+ LSL D0Ar4,D0Ar4,#0x10
+ AND D0FrT,D0FrT,#0xffff
+ CMP D0Ar2,D0.5
+ ADD D0Re0,D0Ar4,D0FrT
+ BHI $4c4
+ CMP D0Ar2,D0.5
+ BNE $4e0
+ CMP D0Re0,D1.7
+ BLS $4e0
+$4c4:
+ SUB D1Ar3,D0Re0,D0.6
+ MOV D0FrT,#0
+ SUB D0Ar4,D0Ar2,D0.7
+ CMP D1Ar3,D0Re0
+ ADDHI D0FrT,D0FrT,#0x1
+ MOV D0Re0,D1Ar3
+ SUB D0Ar2,D0Ar4,D0FrT
+$4e0:
+ SUB D0Ar4,D1.7,D0Re0
+ SUB D1Ar3,D0.5,D0Ar2
+ GETD D1Ar1,[A0StP+#-28]
+ CMP D0Ar4,D1.7
+ GETD D0Ar2,[A0StP+#-32]
+ MOV D0FrT,#0
+ ADDHI D0FrT,D0FrT,#0x1
+ SUB D1Ar3,D1Ar3,D0FrT
+ LSL D0FrT,D1Ar3,D1Ar1
+ MOV D1Ar1,D0Ar2
+ LSR D0Ar4,D0Ar4,D0Ar2
+ OR D0FrT,D0FrT,D0Ar4
+ LSR D1Ar3,D1Ar3,D1Ar1
+ SETD [A0StP+#-8],D0FrT
+ SETD [A0StP+#-4],D1Ar3
+$51c:
+ GETL D0Re0,D1Re0,[A0StP+#-8]
+ GETL D0FrT,D1RtP,[A0StP+#-72]
+ GETL D0.5,D1.5,[A0StP+#-64]
+ GETL D0.6,D1.6,[A0StP+#-56]
+ GETL D0.7,D1.7,[A0StP+#-48]
+ GETL A0FrP,A1LbP,[A0StP+#-40]
+ SUB A0StP,A0StP,#0x48
+ MOV PC,D1RtP
+ .size ___umoddi3,.-___umoddi3
+
--
1.7.11.7
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Next message: Chen Gang: "Re: [PATCH] arch: metag: kernel: export 'cpu_core_map' in "topology.c""
Previous message: Christoph Hellwig: "Re: [PATCH] closures: move to lib/"
Next in thread: James Hogan: "Re: [PATCH] arch: metag: lib: add "umoddi3.S" file for __umoddi3()"
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