Re: [PATCH v2 10/10] intel-gtt: Read 64bit for gmar_bus_addr
From: Yinghai Lu
Date: Fri Dec 20 2013 - 20:20:08 EST
On Fri, Dec 20, 2013 at 4:27 PM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote:
> Why are we reading these BARs directly anyway? These look like
> standard PCI BARs (I810_GMADDR == 0x10 and I915_GMADDR == 0x18), so
> the PCI core should already be reading them correctly, shouldn't it?
> Can't we just use pcibios_resource_to_bus(pci_resource_start())?
>
> It looks like i810_setup(), i830_setup(), and i9xx_setup() have the
> same problem and should also be using pci_resource_start() or
> something similar.
Agreed.
should be sth like:
Index: linux-2.6/drivers/char/agp/intel-gtt.c
===================================================================
--- linux-2.6.orig/drivers/char/agp/intel-gtt.c
+++ linux-2.6/drivers/char/agp/intel-gtt.c
@@ -608,9 +608,9 @@ static bool intel_gtt_can_wc(void)
static int intel_gtt_init(void)
{
- u32 gma_addr;
+ struct pci_bus_region r;
u32 gtt_map_size;
- int ret;
+ int ret, idx;
ret = intel_private.driver->setup();
if (ret != 0)
@@ -660,13 +660,14 @@ static int intel_gtt_init(void)
}
if (INTEL_GTT_GEN <= 2)
- pci_read_config_dword(intel_private.pcidev, I810_GMADDR,
- &gma_addr);
+ idx = 0; /* I810_GMADDR */
else
- pci_read_config_dword(intel_private.pcidev, I915_GMADDR,
- &gma_addr);
+ idx = 2; /* I915_GMADDR */
- intel_private.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
+ pcibios_resource_to_bus(intel_private.pcidev->bus, &r,
+ &intel_private.pcidev->resource[idx]);
+
+ intel_private.gma_bus_addr = r.start;
return 0;
}
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index b8e2014..0250017 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -608,9 +608,9 @@ static bool intel_gtt_can_wc(void)
static int intel_gtt_init(void)
{
- u32 gma_addr;
+ struct pci_bus_region r;
u32 gtt_map_size;
- int ret;
+ int ret, idx;
ret = intel_private.driver->setup();
if (ret != 0)
@@ -660,13 +660,14 @@ static int intel_gtt_init(void)
}
if (INTEL_GTT_GEN <= 2)
- pci_read_config_dword(intel_private.pcidev, I810_GMADDR,
- &gma_addr);
+ idx = 0; /* I810_GMADDR */
else
- pci_read_config_dword(intel_private.pcidev, I915_GMADDR,
- &gma_addr);
+ idx = 2; /* I915_GMADDR */
+
+ pcibios_resource_to_bus(intel_private.pcidev->bus, &r,
+ &intel_private.pcidev->resource[idx]);
- intel_private.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
+ intel_private.gma_bus_addr = r.start;
return 0;
}