Re: Internal error: Oops: 17 [#1] ARM

[John Tobias]

Hi Fabio,

Attached are the two patch files that I applied in the 3.13 released
so that the kernel will detect my eMMC in DDR50.
(let me correct my previous email, I was mentioning SDR50 but it
should be DDR50).
eMMC info:

clock:          52000000 Hz
actual clock:   49500000 Hz
vdd:            21 (3.3 ~ 3.4 V)
bus mode:       2 (push-pull)
chip select:    0 (don't care)
power mode:     2 (on)
bus width:      3 (8 bits)
timing spec:    1 (mmc high-speed)
signal voltage: 0 (3.30 V)

I reboot my device often and it shows during the reboot.

Regards,

john




On Wed, Jan 22, 2014 at 6:28 PM, Fabio Estevam <festevam@xxxxxxxxx> wrote:
> On Wed, Jan 22, 2014 at 9:49 PM, John Tobias <john.tobias.ph@xxxxxxxxx> wrote:
>> Hello all,
>>
>> Just to confirm that the error I posted previously exist in 3.13
>> released. Just be noted that some patches related to eMMC/sdhci has
>> been applied in order to boot the 3.13 on my board.
>> Addition to that, I was getting additional errors (please see below):
>> - It happened during the reboot.
>>
>> Cc'ng Dong Aisheng.
>
> What are the steps to reproduce this? Which SoC are you using?
>
> Regards,
>
> Fabio Estevam

Attachment: sdhci-esdhc-imx.patch
Description: Binary data

Attachment: sdhci.patch
Description: Binary data