Re: [PATCH v10 1/4] qrwlock: A queue read/write lock implementation

[Peter Zijlstra]

On Thu, Jan 23, 2014 at 09:15:38AM -0800, Linus Torvalds wrote:
> On Thu, Jan 23, 2014 at 9:12 AM, Waiman Long <waiman.long@xxxxxx> wrote:
> >
> > I thought that all atomic RMW instructions are memory barrier.
> 
> On x86 they are. Not necessarily elsewhere.
> 
> > If they are not, what kind of barrier should be added?
> 
> smp_mb__before_atomic_xyz() and smp_mb__after_atomic_xyz() will do it,
> and are no-op (well, barriers - I don't think it matters) on x86.

Right, which on PPC are sync, whereas the release need only have lwsync.

And ARM can actually do atomic_sub_release() but cannot do it with an
additional smp_*__after() construct.

Do we care enough to introduce atomic_sub_release() for them?

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/