Re: x86: Inconsistent xAPIC synchronization in arch_irq_work_raise?

[Andi Kleen]

> So now I'm looking for consistent locking rules (which type of lock, who
> is responsible when issuing IPIs?) and a good (ie. also efficient) way
> to apply them.

It has to be lockless, the machine checks run as NMIs.
The whole point of the self nmi is to get back to a lockable state.

-Andi
-- 
ak@xxxxxxxxxxxxxxx -- Speaking for myself only.
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