[PATCH]Documentation:Update Documentation/zh_CN/arm64/booting.txt

[Fu Wei]

This is a update of Chinese documentation: Documentation/zh_CN/arm64/booting.txt

It is based on the modifications of Documentation/arm64/booting.txt in submission:
"4d5e0b15", "4370eec0", "4fcd6e14".

Update maintainer's Email address.

Signed-off-by: Fu Wei <wefu@xxxxxxxxxx>

---
diff --git a/Documentation/zh_CN/arm64/booting.txt b/Documentation/zh_CN/arm64/booting.txt
index 28fa325..6f6d956 100644
--- a/Documentation/zh_CN/arm64/booting.txt
+++ b/Documentation/zh_CN/arm64/booting.txt
@@ -7,7 +7,7 @@ help.  Contact the Chinese maintainer if this translation is outdated
 or if there is a problem with the translation.
 
 Maintainer: Will Deacon <will.deacon@xxxxxxx>
-Chinese maintainer: Fu Wei <tekkamanninja@xxxxxxxxx>
+Chinese maintainer: Fu Wei <wefu@xxxxxxxxxx>
 ---------------------------------------------------------------------
 Documentation/arm64/booting.txt çäæçè
 
@@ -16,9 +16,9 @@ Documentation/arm64/booting.txt çäæçè
 èååééïèèçäæççæèã
 
 èæççæèï Will Deacon <will.deacon@xxxxxxx>
-äæççæèï åç  Fu Wei <tekkamanninja@xxxxxxxxx>
-äæççèèï åç  Fu Wei <tekkamanninja@xxxxxxxxx>
-äæçæèèï åç  Fu Wei <tekkamanninja@xxxxxxxxx>
+äæççæèï åç  Fu Wei <wefu@xxxxxxxxxx>
+äæççèèï åç  Fu Wei <wefu@xxxxxxxxxx>
+äæçæèèï åç  Fu Wei <wefu@xxxxxxxxxx>
 
 äääææ
 ---------------------------------------------------------------------
@@ -64,8 +64,8 @@ RAMïæåèäçåèäèååçç RAM äæïèåèäçää
 
 åèæ: åå
 
-èåæææåïdtbïåååéäåä 2 MBïääääåææåèåçèçää
-512MB åç 2MB èçäãèäååæåäéèååéèäçåäèæèçæ
+èåæææåïdtbïåé 8 åèåéïåäääåææåèåçèçää 512MB
+åïääåèè 2MB åéèçãèäååæåäéèååéèäçåäèæèçæ
 æåæææåã
 
 
@@ -84,13 +84,23 @@ AArch64 åæååæææäèèåäçïåæåæäçäåçå
 
 åèæ: åå
 
-åèåçåææåååää 32 åèçåïåååäï
+åèåçåææåååää 64 åèçåïåååäï
 
-  u32 magic	= 0x14000008;	/* èèå stext, åç */
-  u32 res0	= 0;		/* äç */
+  u32 code0;			/* åæèäç */
+  u32 code1;			/* åæèäç */
   u64 text_offset;		/* æåèèåç */
+  u64 res0	= 0;		/* äç */
   u64 res1	= 0;		/* äç */
   u64 res2	= 0;		/* äç */
+  u64 res3	= 0;		/* äç */
+  u64 res4	= 0;		/* äç */
+  u32 magic	= 0x644d5241;	/* éæ, åç, "ARM\x64" */
+  u32 res5 = 0;      		/* äç */
+
+
+æååæéï
+
+- code0/code1 èèèèå stext.
 
 æååéääçç RAM èååççååçïååæ 0x80000ïãçç RAM
 çèååååéæä 2MB åéçã
@@ -118,9 +128,9 @@ AArch64 åæååæææäèèåäçïåæåæäçäåçå
   åéééçåïåæååïåééçåççã
 
 - ææèæå
-  CNTFRQ åéèåäèæåçéçã
-  åæå EL1 æåäèååæïå CNTHCTL_EL2 äç EL1PCTEN (bit 0)
-  åéçäã
+  CNTFRQ åéèåäèæåçéçïä CNTVOFF åéèåäåææ CPU
+  éäèçåãåæå EL1 æåäèååæïå CNTHCTL_EL2 äç
+  EL1PCTEN (bit 0) åéçäã
 
 - äèæ
   éèåæååçææ CPU ååæååååäåéåäçåçäèæåäã
@@ -131,23 +141,40 @@ AArch64 åæååæææäèèåäçïåæåæäçäåçå
   åèååææåçååçäïææææäååçççååååééèèä
   åääæéçååçåäåååïäéæå æç çæäèèã
 
+ääåä CPU æåãééçåãMMUãææèæåãäèæãççåååç
+åèæäæèéçäææ CPUãææ CPU åéååäååçåèååæã
+
 ååèèçååéåæä CPU åäääçææèååæååï
 
 - ä CPU åéçæèååææåççäææäãéèæ CPU äéçèåæ
-  ææååéåæä CPU èçäååääååï
-
-    1ãâenable-methodâåæãçåïæåæææçåääåçäâspin-tableâã
-
-    2ãâcpu-release-addrâæèää 64-bitãåååäéçååäçã
+  ææååéåæä CPU èçäååää âenable-methodâ åæïæ
+  ææç enable-method èèäæã
 
   ååèèçååéçæèäèåæåæïååèååæååäåååæå
   ææåã
 
-- ääèå CPU åéåååäçåïéèèåæäç /memreserve/ åäé
+- enable-method ä âspin-tableâ ç CPU åéååäç CPU
+  èçäååää âcpu-release-addrâ åæãèäåææèäää
+  64 äèçåéäåååäéçååäçã
+
+  èä CPU åéåååäçåïéèèåæäç /memreserve/ åäé
   çåæïäèæäåæäåïèèåäç cpu-release-addr äçïåé
   åååäçåäïãåéèæå wfe æäæéäååçåéïèä CPU å
   åå sev æäãåå cpu-release-addr ææäççèåæäèåééå
-  æïCPU åéçæèåæåææåçååã
+  æïCPU åéèåæåææåçååãæåäääåçç 64 äåçåï
+  åæ CPU éåèèååæèåçåèæäåæèççæåã
+
+- enable-method ä âpsciâ ç CPU äæååæåïæåïå
+  memory èçäæèäåæçéçååååïæåéèèåæ /memreserve/
+  åäæèäåæäçåççéäïãåæåäåèå ARM ææïçå
+  ARM DEN 0022Aïçä ARM äççæçæåèæåççèäïäæèç
+  CPU_ON èçæå CPU åååæã
+
+  *èèæ:åææçèæïæææåææä ARM DEN 0022Bã
+
+  èåæåéååää âpsciâ èçïèåèääææï
+  Documentation/devicetree/bindings/arm/psci.txt
+
 
 - èå CPU éçåååèç
   x0 = 0 (äçïåæåèäç)
--
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