[PATCH] drivers:staging:octeon-usb: Fixed Bitfields coding style errors
From: Surendra Patil
Date: Fri Jan 31 2014 - 02:18:42 EST
Fixed Below coding style errors -
octeon-hcd.h:146: ERROR: spaces prohibited around that ':' (ctx:WxW)
octeon-hcd.h:147: ERROR: spaces prohibited around that ':' (ctx:WxW)
total: 243 errors, 0 warnings, 1819 lines checked - fixed all errors
Signed-off-by: Surendra Patil <surendra.tux@xxxxxxxxx>
---
drivers/staging/octeon-usb/octeon-hcd.h | 486 ++++++++++++++++----------------
1 file changed, 243 insertions(+), 243 deletions(-)
diff --git a/drivers/staging/octeon-usb/octeon-hcd.h b/drivers/staging/octeon-usb/octeon-hcd.h
index 42fe4fe..c534e317 100644
--- a/drivers/staging/octeon-usb/octeon-hcd.h
+++ b/drivers/staging/octeon-usb/octeon-hcd.h
@@ -143,13 +143,13 @@ union cvmx_usbcx_gahbcfg {
* * 1'b1: Unmask the interrupt assertion to the application.
*/
struct cvmx_usbcx_gahbcfg_s {
- uint32_t reserved_9_31 : 23;
- uint32_t ptxfemplvl : 1;
- uint32_t nptxfemplvl : 1;
- uint32_t reserved_6_6 : 1;
- uint32_t dmaen : 1;
- uint32_t hbstlen : 4;
- uint32_t glblintrmsk : 1;
+ uint32_t reserved_9_31:23;
+ uint32_t ptxfemplvl:1;
+ uint32_t nptxfemplvl:1;
+ uint32_t reserved_6_6:1;
+ uint32_t dmaen:1;
+ uint32_t hbstlen:4;
+ uint32_t glblintrmsk:1;
} s;
};
@@ -209,16 +209,16 @@ union cvmx_usbcx_ghwcfg3 {
* * Others: Reserved
*/
struct cvmx_usbcx_ghwcfg3_s {
- uint32_t dfifodepth : 16;
- uint32_t reserved_13_15 : 3;
- uint32_t ahbphysync : 1;
- uint32_t rsttype : 1;
- uint32_t optfeature : 1;
- uint32_t vendor_control_interface_support : 1;
- uint32_t i2c_selection : 1;
- uint32_t otgen : 1;
- uint32_t pktsizewidth : 3;
- uint32_t xfersizewidth : 4;
+ uint32_t dfifodepth:16;
+ uint32_t reserved_13_15:3;
+ uint32_t ahbphysync:1;
+ uint32_t rsttype:1;
+ uint32_t optfeature:1;
+ uint32_t vendor_control_interface_support:1;
+ uint32_t i2c_selection:1;
+ uint32_t otgen:1;
+ uint32_t pktsizewidth:3;
+ uint32_t xfersizewidth:4;
} s;
};
@@ -275,38 +275,38 @@ union cvmx_usbcx_gintmsk {
* @modemismsk: Mode Mismatch Interrupt Mask (ModeMisMsk)
*/
struct cvmx_usbcx_gintmsk_s {
- uint32_t wkupintmsk : 1;
- uint32_t sessreqintmsk : 1;
- uint32_t disconnintmsk : 1;
- uint32_t conidstschngmsk : 1;
- uint32_t reserved_27_27 : 1;
- uint32_t ptxfempmsk : 1;
- uint32_t hchintmsk : 1;
- uint32_t prtintmsk : 1;
- uint32_t reserved_23_23 : 1;
- uint32_t fetsuspmsk : 1;
- uint32_t incomplpmsk : 1;
- uint32_t incompisoinmsk : 1;
- uint32_t oepintmsk : 1;
- uint32_t inepintmsk : 1;
- uint32_t epmismsk : 1;
- uint32_t reserved_16_16 : 1;
- uint32_t eopfmsk : 1;
- uint32_t isooutdropmsk : 1;
- uint32_t enumdonemsk : 1;
- uint32_t usbrstmsk : 1;
- uint32_t usbsuspmsk : 1;
- uint32_t erlysuspmsk : 1;
- uint32_t i2cint : 1;
- uint32_t ulpickintmsk : 1;
- uint32_t goutnakeffmsk : 1;
- uint32_t ginnakeffmsk : 1;
- uint32_t nptxfempmsk : 1;
- uint32_t rxflvlmsk : 1;
- uint32_t sofmsk : 1;
- uint32_t otgintmsk : 1;
- uint32_t modemismsk : 1;
- uint32_t reserved_0_0 : 1;
+ uint32_t wkupintmsk:1;
+ uint32_t sessreqintmsk:1;
+ uint32_t disconnintmsk:1;
+ uint32_t conidstschngmsk:1;
+ uint32_t reserved_27_27:1;
+ uint32_t ptxfempmsk:1;
+ uint32_t hchintmsk:1;
+ uint32_t prtintmsk:1;
+ uint32_t reserved_23_23:1;
+ uint32_t fetsuspmsk:1;
+ uint32_t incomplpmsk:1;
+ uint32_t incompisoinmsk:1;
+ uint32_t oepintmsk:1;
+ uint32_t inepintmsk:1;
+ uint32_t epmismsk:1;
+ uint32_t reserved_16_16:1;
+ uint32_t eopfmsk:1;
+ uint32_t isooutdropmsk:1;
+ uint32_t enumdonemsk:1;
+ uint32_t usbrstmsk:1;
+ uint32_t usbsuspmsk:1;
+ uint32_t erlysuspmsk:1;
+ uint32_t i2cint:1;
+ uint32_t ulpickintmsk:1;
+ uint32_t goutnakeffmsk:1;
+ uint32_t ginnakeffmsk:1;
+ uint32_t nptxfempmsk:1;
+ uint32_t rxflvlmsk:1;
+ uint32_t sofmsk:1;
+ uint32_t otgintmsk:1;
+ uint32_t modemismsk:1;
+ uint32_t reserved_0_0:1;
} s;
};
@@ -504,38 +504,38 @@ union cvmx_usbcx_gintsts {
* * 1'b1: Host mode
*/
struct cvmx_usbcx_gintsts_s {
- uint32_t wkupint : 1;
- uint32_t sessreqint : 1;
- uint32_t disconnint : 1;
- uint32_t conidstschng : 1;
- uint32_t reserved_27_27 : 1;
- uint32_t ptxfemp : 1;
- uint32_t hchint : 1;
- uint32_t prtint : 1;
- uint32_t reserved_23_23 : 1;
- uint32_t fetsusp : 1;
- uint32_t incomplp : 1;
- uint32_t incompisoin : 1;
- uint32_t oepint : 1;
- uint32_t iepint : 1;
- uint32_t epmis : 1;
- uint32_t reserved_16_16 : 1;
- uint32_t eopf : 1;
- uint32_t isooutdrop : 1;
- uint32_t enumdone : 1;
- uint32_t usbrst : 1;
- uint32_t usbsusp : 1;
- uint32_t erlysusp : 1;
- uint32_t i2cint : 1;
- uint32_t ulpickint : 1;
- uint32_t goutnakeff : 1;
- uint32_t ginnakeff : 1;
- uint32_t nptxfemp : 1;
- uint32_t rxflvl : 1;
- uint32_t sof : 1;
- uint32_t otgint : 1;
- uint32_t modemis : 1;
- uint32_t curmod : 1;
+ uint32_t wkupint:1;
+ uint32_t sessreqint:1;
+ uint32_t disconnint:1;
+ uint32_t conidstschng:1;
+ uint32_t reserved_27_27:1;
+ uint32_t ptxfemp:1;
+ uint32_t hchint:1;
+ uint32_t prtint:1;
+ uint32_t reserved_23_23:1;
+ uint32_t fetsusp:1;
+ uint32_t incomplp:1;
+ uint32_t incompisoin:1;
+ uint32_t oepint:1;
+ uint32_t iepint:1;
+ uint32_t epmis:1;
+ uint32_t reserved_16_16:1;
+ uint32_t eopf:1;
+ uint32_t isooutdrop:1;
+ uint32_t enumdone:1;
+ uint32_t usbrst:1;
+ uint32_t usbsusp:1;
+ uint32_t erlysusp:1;
+ uint32_t i2cint:1;
+ uint32_t ulpickint:1;
+ uint32_t goutnakeff:1;
+ uint32_t ginnakeff:1;
+ uint32_t nptxfemp:1;
+ uint32_t rxflvl:1;
+ uint32_t sof:1;
+ uint32_t otgint:1;
+ uint32_t modemis:1;
+ uint32_t curmod:1;
} s;
};
@@ -560,8 +560,8 @@ union cvmx_usbcx_gnptxfsiz {
* Transmit FIFO RAM.
*/
struct cvmx_usbcx_gnptxfsiz_s {
- uint32_t nptxfdep : 16;
- uint32_t nptxfstaddr : 16;
+ uint32_t nptxfdep:16;
+ uint32_t nptxfstaddr:16;
} s;
};
@@ -610,10 +610,10 @@ union cvmx_usbcx_gnptxsts {
* * Others: Reserved
*/
struct cvmx_usbcx_gnptxsts_s {
- uint32_t reserved_31_31 : 1;
- uint32_t nptxqtop : 7;
- uint32_t nptxqspcavail : 8;
- uint32_t nptxfspcavail : 16;
+ uint32_t reserved_31_31:1;
+ uint32_t nptxqtop:7;
+ uint32_t nptxqspcavail:8;
+ uint32_t nptxfspcavail:16;
} s;
};
@@ -731,16 +731,16 @@ union cvmx_usbcx_grstctl {
* selected, the PHY domain has to be reset for proper operation.
*/
struct cvmx_usbcx_grstctl_s {
- uint32_t ahbidle : 1;
- uint32_t dmareq : 1;
- uint32_t reserved_11_29 : 19;
- uint32_t txfnum : 5;
- uint32_t txfflsh : 1;
- uint32_t rxfflsh : 1;
- uint32_t intknqflsh : 1;
- uint32_t frmcntrrst : 1;
- uint32_t hsftrst : 1;
- uint32_t csftrst : 1;
+ uint32_t ahbidle:1;
+ uint32_t dmareq:1;
+ uint32_t reserved_11_29:19;
+ uint32_t txfnum:5;
+ uint32_t txfflsh:1;
+ uint32_t rxfflsh:1;
+ uint32_t intknqflsh:1;
+ uint32_t frmcntrrst:1;
+ uint32_t hsftrst:1;
+ uint32_t csftrst:1;
} s;
};
@@ -762,8 +762,8 @@ union cvmx_usbcx_grxfsiz {
* * Maximum value is 32768
*/
struct cvmx_usbcx_grxfsiz_s {
- uint32_t reserved_16_31 : 16;
- uint32_t rxfdep : 16;
+ uint32_t reserved_16_31:16;
+ uint32_t rxfdep:16;
} s;
};
@@ -804,11 +804,11 @@ union cvmx_usbcx_grxstsph {
* packet belongs.
*/
struct cvmx_usbcx_grxstsph_s {
- uint32_t reserved_21_31 : 11;
- uint32_t pktsts : 4;
- uint32_t dpid : 2;
- uint32_t bcnt : 11;
- uint32_t chnum : 4;
+ uint32_t reserved_21_31:11;
+ uint32_t pktsts:4;
+ uint32_t dpid:2;
+ uint32_t bcnt:11;
+ uint32_t chnum:4;
} s;
};
@@ -884,19 +884,19 @@ union cvmx_usbcx_gusbcfg {
* * One 48-MHz PHY clock = 0.25 bit times
*/
struct cvmx_usbcx_gusbcfg_s {
- uint32_t reserved_17_31 : 15;
- uint32_t otgi2csel : 1;
- uint32_t phylpwrclksel : 1;
- uint32_t reserved_14_14 : 1;
- uint32_t usbtrdtim : 4;
- uint32_t hnpcap : 1;
- uint32_t srpcap : 1;
- uint32_t ddrsel : 1;
- uint32_t physel : 1;
- uint32_t fsintf : 1;
- uint32_t ulpi_utmi_sel : 1;
- uint32_t phyif : 1;
- uint32_t toutcal : 3;
+ uint32_t reserved_17_31:15;
+ uint32_t otgi2csel:1;
+ uint32_t phylpwrclksel:1;
+ uint32_t reserved_14_14:1;
+ uint32_t usbtrdtim:4;
+ uint32_t hnpcap:1;
+ uint32_t srpcap:1;
+ uint32_t ddrsel:1;
+ uint32_t physel:1;
+ uint32_t fsintf:1;
+ uint32_t ulpi_utmi_sel:1;
+ uint32_t phyif:1;
+ uint32_t toutcal:3;
} s;
};
@@ -920,8 +920,8 @@ union cvmx_usbcx_haint {
* One bit per channel: Bit 0 for Channel 0, bit 15 for Channel 15
*/
struct cvmx_usbcx_haint_s {
- uint32_t reserved_16_31 : 16;
- uint32_t haint : 16;
+ uint32_t reserved_16_31:16;
+ uint32_t haint:16;
} s;
};
@@ -944,8 +944,8 @@ union cvmx_usbcx_haintmsk {
* One bit per channel: Bit 0 for channel 0, bit 15 for channel 15
*/
struct cvmx_usbcx_haintmsk_s {
- uint32_t reserved_16_31 : 16;
- uint32_t haintmsk : 16;
+ uint32_t reserved_16_31:16;
+ uint32_t haintmsk:16;
} s;
};
@@ -1014,17 +1014,17 @@ union cvmx_usbcx_hccharx {
* Indicates the maximum packet size of the associated endpoint.
*/
struct cvmx_usbcx_hccharx_s {
- uint32_t chena : 1;
- uint32_t chdis : 1;
- uint32_t oddfrm : 1;
- uint32_t devaddr : 7;
- uint32_t ec : 2;
- uint32_t eptype : 2;
- uint32_t lspddev : 1;
- uint32_t reserved_16_16 : 1;
- uint32_t epdir : 1;
- uint32_t epnum : 4;
- uint32_t mps : 11;
+ uint32_t chena:1;
+ uint32_t chdis:1;
+ uint32_t oddfrm:1;
+ uint32_t devaddr:7;
+ uint32_t ec:2;
+ uint32_t eptype:2;
+ uint32_t lspddev:1;
+ uint32_t reserved_16_16:1;
+ uint32_t epdir:1;
+ uint32_t epnum:4;
+ uint32_t mps:11;
} s;
};
@@ -1069,9 +1069,9 @@ union cvmx_usbcx_hcfg {
* * 2'b11: Reserved
*/
struct cvmx_usbcx_hcfg_s {
- uint32_t reserved_3_31 : 29;
- uint32_t fslssupp : 1;
- uint32_t fslspclksel : 2;
+ uint32_t reserved_3_31:29;
+ uint32_t fslssupp:1;
+ uint32_t fslspclksel:2;
} s;
};
@@ -1110,18 +1110,18 @@ union cvmx_usbcx_hcintx {
* Transfer completed normally without any errors.
*/
struct cvmx_usbcx_hcintx_s {
- uint32_t reserved_11_31 : 21;
- uint32_t datatglerr : 1;
- uint32_t frmovrun : 1;
- uint32_t bblerr : 1;
- uint32_t xacterr : 1;
- uint32_t nyet : 1;
- uint32_t ack : 1;
- uint32_t nak : 1;
- uint32_t stall : 1;
- uint32_t ahberr : 1;
- uint32_t chhltd : 1;
- uint32_t xfercompl : 1;
+ uint32_t reserved_11_31:21;
+ uint32_t datatglerr:1;
+ uint32_t frmovrun:1;
+ uint32_t bblerr:1;
+ uint32_t xacterr:1;
+ uint32_t nyet:1;
+ uint32_t ack:1;
+ uint32_t nak:1;
+ uint32_t stall:1;
+ uint32_t ahberr:1;
+ uint32_t chhltd:1;
+ uint32_t xfercompl:1;
} s;
};
@@ -1151,18 +1151,18 @@ union cvmx_usbcx_hcintmskx {
* @xfercomplmsk: Transfer Completed Mask (XferComplMsk)
*/
struct cvmx_usbcx_hcintmskx_s {
- uint32_t reserved_11_31 : 21;
- uint32_t datatglerrmsk : 1;
- uint32_t frmovrunmsk : 1;
- uint32_t bblerrmsk : 1;
- uint32_t xacterrmsk : 1;
- uint32_t nyetmsk : 1;
- uint32_t ackmsk : 1;
- uint32_t nakmsk : 1;
- uint32_t stallmsk : 1;
- uint32_t ahberrmsk : 1;
- uint32_t chhltdmsk : 1;
- uint32_t xfercomplmsk : 1;
+ uint32_t reserved_11_31:21;
+ uint32_t datatglerrmsk:1;
+ uint32_t frmovrunmsk:1;
+ uint32_t bblerrmsk:1;
+ uint32_t xacterrmsk:1;
+ uint32_t nyetmsk:1;
+ uint32_t ackmsk:1;
+ uint32_t nakmsk:1;
+ uint32_t stallmsk:1;
+ uint32_t ahberrmsk:1;
+ uint32_t chhltdmsk:1;
+ uint32_t xfercomplmsk:1;
} s;
};
@@ -1201,12 +1201,12 @@ union cvmx_usbcx_hcspltx {
* translator.
*/
struct cvmx_usbcx_hcspltx_s {
- uint32_t spltena : 1;
- uint32_t reserved_17_30 : 14;
- uint32_t compsplt : 1;
- uint32_t xactpos : 2;
- uint32_t hubaddr : 7;
- uint32_t prtaddr : 7;
+ uint32_t spltena:1;
+ uint32_t reserved_17_30:14;
+ uint32_t compsplt:1;
+ uint32_t xactpos:2;
+ uint32_t hubaddr:7;
+ uint32_t prtaddr:7;
} s;
};
@@ -1246,10 +1246,10 @@ union cvmx_usbcx_hctsizx {
* size for IN transactions (periodic and non-periodic).
*/
struct cvmx_usbcx_hctsizx_s {
- uint32_t dopng : 1;
- uint32_t pid : 2;
- uint32_t pktcnt : 10;
- uint32_t xfersize : 19;
+ uint32_t dopng:1;
+ uint32_t pid:2;
+ uint32_t pktcnt:10;
+ uint32_t xfersize:19;
} s;
};
@@ -1283,8 +1283,8 @@ union cvmx_usbcx_hfir {
* * 1 ms (PHY clock frequency for FS/LS)
*/
struct cvmx_usbcx_hfir_s {
- uint32_t reserved_16_31 : 16;
- uint32_t frint : 16;
+ uint32_t reserved_16_31:16;
+ uint32_t frint:16;
} s;
};
@@ -1312,8 +1312,8 @@ union cvmx_usbcx_hfnum {
* USB, and is reset to 0 when it reaches 16'h3FFF.
*/
struct cvmx_usbcx_hfnum_s {
- uint32_t frrem : 16;
- uint32_t frnum : 16;
+ uint32_t frrem:16;
+ uint32_t frnum:16;
} s;
};
@@ -1439,21 +1439,21 @@ union cvmx_usbcx_hprt {
* * 1: A device is attached to the port.
*/
struct cvmx_usbcx_hprt_s {
- uint32_t reserved_19_31 : 13;
- uint32_t prtspd : 2;
- uint32_t prttstctl : 4;
- uint32_t prtpwr : 1;
- uint32_t prtlnsts : 2;
- uint32_t reserved_9_9 : 1;
- uint32_t prtrst : 1;
- uint32_t prtsusp : 1;
- uint32_t prtres : 1;
- uint32_t prtovrcurrchng : 1;
- uint32_t prtovrcurract : 1;
- uint32_t prtenchng : 1;
- uint32_t prtena : 1;
- uint32_t prtconndet : 1;
- uint32_t prtconnsts : 1;
+ uint32_t reserved_19_31:13;
+ uint32_t prtspd:2;
+ uint32_t prttstctl:4;
+ uint32_t prtpwr:1;
+ uint32_t prtlnsts:2;
+ uint32_t reserved_9_9:1;
+ uint32_t prtrst:1;
+ uint32_t prtsusp:1;
+ uint32_t prtres:1;
+ uint32_t prtovrcurrchng:1;
+ uint32_t prtovrcurract:1;
+ uint32_t prtenchng:1;
+ uint32_t prtena:1;
+ uint32_t prtconndet:1;
+ uint32_t prtconnsts:1;
} s;
};
@@ -1476,8 +1476,8 @@ union cvmx_usbcx_hptxfsiz {
* @ptxfstaddr: Host Periodic TxFIFO Start Address (PTxFStAddr)
*/
struct cvmx_usbcx_hptxfsiz_s {
- uint32_t ptxfsize : 16;
- uint32_t ptxfstaddr : 16;
+ uint32_t ptxfsize:16;
+ uint32_t ptxfstaddr:16;
} s;
};
@@ -1531,9 +1531,9 @@ union cvmx_usbcx_hptxsts {
* * Others: Reserved
*/
struct cvmx_usbcx_hptxsts_s {
- uint32_t ptxqtop : 8;
- uint32_t ptxqspcavail : 8;
- uint32_t ptxfspcavail : 16;
+ uint32_t ptxqtop:8;
+ uint32_t ptxqspcavail:8;
+ uint32_t ptxfspcavail:16;
} s;
};
@@ -1636,21 +1636,21 @@ union cvmx_usbnx_clk_ctl {
* until AFTER this field is set and then read.
*/
struct cvmx_usbnx_clk_ctl_s {
- uint64_t reserved_20_63 : 44;
- uint64_t divide2 : 2;
- uint64_t hclk_rst : 1;
- uint64_t p_x_on : 1;
- uint64_t p_rtype : 2;
- uint64_t p_com_on : 1;
- uint64_t p_c_sel : 2;
- uint64_t cdiv_byp : 1;
- uint64_t sd_mode : 2;
- uint64_t s_bist : 1;
- uint64_t por : 1;
- uint64_t enable : 1;
- uint64_t prst : 1;
- uint64_t hrst : 1;
- uint64_t divide : 3;
+ uint64_t reserved_20_63:44;
+ uint64_t divide2:2;
+ uint64_t hclk_rst:1;
+ uint64_t p_x_on:1;
+ uint64_t p_rtype:2;
+ uint64_t p_com_on:1;
+ uint64_t p_c_sel:2;
+ uint64_t cdiv_byp:1;
+ uint64_t sd_mode:2;
+ uint64_t s_bist:1;
+ uint64_t por:1;
+ uint64_t enable:1;
+ uint64_t prst:1;
+ uint64_t hrst:1;
+ uint64_t divide:3;
} s;
};
@@ -1778,41 +1778,41 @@ union cvmx_usbnx_usbp_ctl_status {
* de-assertion.
*/
struct cvmx_usbnx_usbp_ctl_status_s {
- uint64_t txrisetune : 1;
- uint64_t txvreftune : 4;
- uint64_t txfslstune : 4;
- uint64_t txhsxvtune : 2;
- uint64_t sqrxtune : 3;
- uint64_t compdistune : 3;
- uint64_t otgtune : 3;
- uint64_t otgdisable : 1;
- uint64_t portreset : 1;
- uint64_t drvvbus : 1;
- uint64_t lsbist : 1;
- uint64_t fsbist : 1;
- uint64_t hsbist : 1;
- uint64_t bist_done : 1;
- uint64_t bist_err : 1;
- uint64_t tdata_out : 4;
- uint64_t siddq : 1;
- uint64_t txpreemphasistune : 1;
- uint64_t dma_bmode : 1;
- uint64_t usbc_end : 1;
- uint64_t usbp_bist : 1;
- uint64_t tclk : 1;
- uint64_t dp_pulld : 1;
- uint64_t dm_pulld : 1;
- uint64_t hst_mode : 1;
- uint64_t tuning : 4;
- uint64_t tx_bs_enh : 1;
- uint64_t tx_bs_en : 1;
- uint64_t loop_enb : 1;
- uint64_t vtest_enb : 1;
- uint64_t bist_enb : 1;
- uint64_t tdata_sel : 1;
- uint64_t taddr_in : 4;
- uint64_t tdata_in : 8;
- uint64_t ate_reset : 1;
+ uint64_t txrisetune:1;
+ uint64_t txvreftune:4;
+ uint64_t txfslstune:4;
+ uint64_t txhsxvtune:2;
+ uint64_t sqrxtune:3;
+ uint64_t compdistune:3;
+ uint64_t otgtune:3;
+ uint64_t otgdisable:1;
+ uint64_t portreset:1;
+ uint64_t drvvbus:1;
+ uint64_t lsbist:1;
+ uint64_t fsbist:1;
+ uint64_t hsbist:1;
+ uint64_t bist_done:1;
+ uint64_t bist_err:1;
+ uint64_t tdata_out:4;
+ uint64_t siddq:1;
+ uint64_t txpreemphasistune:1;
+ uint64_t dma_bmode:1;
+ uint64_t usbc_end:1;
+ uint64_t usbp_bist:1;
+ uint64_t tclk:1;
+ uint64_t dp_pulld:1;
+ uint64_t dm_pulld:1;
+ uint64_t hst_mode:1;
+ uint64_t tuning:4;
+ uint64_t tx_bs_enh:1;
+ uint64_t tx_bs_en:1;
+ uint64_t loop_enb:1;
+ uint64_t vtest_enb:1;
+ uint64_t bist_enb:1;
+ uint64_t tdata_sel:1;
+ uint64_t taddr_in:4;
+ uint64_t tdata_in:8;
+ uint64_t ate_reset:1;
} s;
};
--
1.8.3.2
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