Re: OMAP: clock DT conversion issues with omap36xx

[Christoph Fritz]

On Tue, 2014-02-04 at 17:50 +0200, Tero Kristo wrote:
> On 01/29/2014 01:21 PM, Christoph Fritz wrote:
> >> Currently I only analyzed sys_clkout2 (see attachments for full
> >> clk_summary files):
> >>
> >> clk_summary__next-20140115__works_as_expected:
> >>               dpll4_m2_ck        1           1            96000000
> >>                  dpll4_m2x2_ck   1           1            96000000
> >>                     omap_192m_alwon_fck 1           1            96000000
> >>                        omap_96m_alwon_fck 1           2            96000000
> >>                           per_96m_fck 0           6            96000000
> >>                              mcbsp4_fck 0           1            96000000
> >>                              mcbsp3_fck 0           2            96000000
> >>                              mcbsp2_fck 0           2            96000000
> >>                           cm_96m_fck 2           3            96000000
> >>                              clkout2_src_ck 1           1            96000000
> >>                                 sys_clkout2 1           1            24000000
> >>
> >> For real, on pin sys_clkout2 are correctly 24 Mhz measured.
> >>
> >> clk_summary__next-20140124__sysclkout2_dss_fails:
> >>               dpll4_m2_ck        1           1            96000000
> >>                  dpll4_m2x2_mul_ck 1           1            192000000
> >>                     dpll4_m2x2_ck 1           1            192000000
> >>                        omap_192m_alwon_fck 0           0            192000000
> >>                        omap_96m_alwon_fck 1           2            192000000
> >>                           per_96m_fck 0           6            192000000
> >>                              mcbsp4_fck 0           1            192000000
> >>                              mcbsp3_fck 0           2            192000000
> >>                              mcbsp2_fck 0           2            192000000
> >>                           cm_96m_fck 2           3            192000000
> >>                              clkout2_src_ck 1           1            192000000
> >>                                 sys_clkout2 1           1            24000000
> >>
> >> For real, on pin sys_clkout2 are only ~12 Mhz measured.
> 
> Hey Christoph,
> 
> I had a chance to look at this in more detail, and it looks like your 
> patch above was almost the correct one (except that I think you modified 
> wrong property and also modified the clock node for all omap3 variants.) 
> Can you give this one a shot? Can you also send me the clk-summary dump 
> with this patch (with the relevant nodes)?

             dpll4_m2_ck        1           1            96000000   0
                dpll4_m2x2_mul_ck 1           1            192000000  0
                   dpll4_m2x2_ck 1           1            192000000  0
                      omap_192m_alwon_fck 0           0            192000000  0
                      omap_96m_alwon_fck 1           2            96000000   0
                         per_96m_fck 0           6            96000000   0
                            mcbsp4_fck 0           1            96000000   0
                            mcbsp3_fck 0           2            96000000   0
                            mcbsp2_fck 0           2            96000000   0
                         cm_96m_fck 2           3            96000000   0
                            clkout2_src_ck 1           1            96000000   0
                               sys_clkout2 1           1            24000000   0

Yes, your patch fixes the issues for sys_clkout2. Thanks! If you want,
you can add my:
Tested-by: Christoph Fritz <chf.fritz@xxxxxxxxxxxxxx>

Below is my clock fix for dss: