Re: Does it need to implement irq_set_type method in the ioapic_chip?

[carl peng]

Hi Peter,

At last, the device will be connected to AMBA bus, so the interrupt
pin will be connected to IOAPIC through AMBA bus. The device now
is in the pre-silicon verification stage.

So my question is the same:
Why does APIC driver not implement the irq_set_type method?  if
implement it, will supply more free space for the device driver
developer(they can set the interrupttrigger mode by calling request_irq).

Thank you!
Carl

On Wed, Feb 19, 2014 at 10:34 AM, H. Peter Anvin <hpa@xxxxxxxxx> wrote:
> This is an ACPI device connecting to an internal IOAPIC? If not, how is it connected?
>
> On February 18, 2014 6:32:44 PM PST, carl peng <carlpeng008@xxxxxxxxx> wrote:
>>Hi Thomas,
>>
>>Thanks a lot for your help!
>>
>>But I still have some confusion. Could you please help to give some
>>suggestions to me?
>>
>>1) This device is a ACPI device, the hardware engineer designed it as
>>falling edge interrupt trigger
>>mode, does it need to re-work the hardware and modify it as rising
>>edge trigger mode to suit the
>>Linux APIC driver architecture?
>>2) Why does APIC driver not implement the irq_set_type method?  if
>>implement it, will supply more
>>free space for the device driver developer(they can set the interrupt
>>trigger mode by calling request_irq).
>>
>>Thank you!
>>Carl
>>
>>
>>On Wed, Feb 19, 2014 at 4:13 AM, Thomas Gleixner <tglx@xxxxxxxxxxxxx>
>>wrote:
>>> On Tue, 18 Feb 2014, carl peng wrote:
>>>
>>> Carl, sending the same mail twice within an hour does not speed up
>>> things. It's quite likely that it gets ignored.
>>>
>>>> 1. Does it need to implement irq_set_type method in the ioapic_chip
>>>> structure?
>>>
>>> No. The irq type is configured by the type of the interrupt or the
>>> BIOS.
>>>
>>> ISA  interrupts are always polarity zero edge triggered (historic)
>>>
>>> PCI  interrupts are always polarity one level triggered
>>>
>>> PCIE interrupts are either legacy PCI or with MSI[X] always edge
>>>      triggered
>>>
>>>> 2. if no need to implement it, how can device driver set the trigger
>>mode
>>>> of APIC interrupt controller pin?
>>>
>>> Not at all.
>>>
>>> The device which is connected to one of the busses must follow the
>>> specification of the bus. There is no choice. Any additional
>>> requirements of the device to deal with external signals must be
>>> handled by the device itself and converted to the appropriate bus
>>> requirement.
>>>
>>> This all is configured by the kernel automatically through bus
>>> detection and BIOS tables.
>>>
>>> Thanks,
>>>
>>>         tglx
>
> --
> Sent from my mobile phone.  Please pardon brevity and lack of formatting.
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