[tip:x86/cpufeature] x86, AVX-512: AVX-512 Feature Detection

[tip-bot for Fenghua Yu]

Commit-ID:  8e5780fdeef7dc490b3f0b3a62704593721fa4f3
Gitweb:     http://git.kernel.org/tip/8e5780fdeef7dc490b3f0b3a62704593721fa4f3
Author:     Fenghua Yu <fenghua.yu@xxxxxxxxx>
AuthorDate: Thu, 20 Feb 2014 13:24:50 -0800
Committer:  H. Peter Anvin <hpa@xxxxxxxxxxxxxxx>
CommitDate: Thu, 20 Feb 2014 13:56:55 -0800

x86, AVX-512: AVX-512 Feature Detection

AVX-512 is an extention of AVX2. Its spec can be found at:
http://download-software.intel.com/sites/default/files/managed/71/2e/319433-017.pdf

This patch detects AVX-512 features by CPUID.

Signed-off-by: Fenghua Yu <fenghua.yu@xxxxxxxxx>
Link: http://lkml.kernel.org/r/1392931491-33237-1-git-send-email-fenghua.yu@xxxxxxxxx
Signed-off-by: H. Peter Anvin <hpa@xxxxxxxxxxxxxxx>
Cc: <stable@xxxxxxxxxxxxxxx> # hw enabling
---
 arch/x86/include/asm/cpufeature.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index e099f95..5f12968 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -217,9 +217,13 @@
 #define X86_FEATURE_INVPCID	(9*32+10) /* Invalidate Processor Context ID */
 #define X86_FEATURE_RTM		(9*32+11) /* Restricted Transactional Memory */
 #define X86_FEATURE_MPX		(9*32+14) /* Memory Protection Extension */
+#define X86_FEATURE_AVX512F	(9*32+16) /* AVX-512 Foundation */
 #define X86_FEATURE_RDSEED	(9*32+18) /* The RDSEED instruction */
 #define X86_FEATURE_ADX		(9*32+19) /* The ADCX and ADOX instructions */
 #define X86_FEATURE_SMAP	(9*32+20) /* Supervisor Mode Access Prevention */
+#define X86_FEATURE_AVX512PF	(9*32+26) /* AVX-512 Prefetch */
+#define X86_FEATURE_AVX512ER	(9*32+27) /* AVX-512 Exponential and Reciprocal */
+#define X86_FEATURE_AVX512CD	(9*32+28) /* AVX-512 Conflict Detection */
 
 /*
  * BUG word(s)
--
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