Re: On trying to drop X86_PPRO_FENCE..

[One Thousand Gnomes]

> (Although honestly, that whole thing is so long ago that my "dim
> memory" is very suspect, and it's possible the workaround actually
> came independently of that from Alan Cox. This all happened in
> v2.4.13-rc2 - late 2001 - and the PPro workaround came in together
> with the X86 OOSTORE code, which I *think* was Alan. Asking the gnomes
> in case they remember how it happened).

Because people were actually managing to hit both that and the "funny
area of broken memory" bug on the PPro. I think (but may be wrong) it was
an ALR 6 way that showed up the locking bug. The usual case you hit the
fencing errata on the PPro was MMIO writes to graphics cards. Several
drivers (notably the 3Dfx drivers) had special fencing workarounds for it.

OOSTORE was for the IDT WinChip which was an unrelated x86 processor
which had an interesting ability to run with slacker cache coherency. It
was a very simple minded CPU so wasn't good at speculation so you could
get *big* performance gains by putting it in out of order store mode.

It just happened that the feature and erratum looked similar so got dealt
with in the same basic way.

It's worth reading some of the other errata documents, fencing errata of
various kinds pop up in a wide range of x86 processors. It's up there
with "rep movs" for 'wtf' behaviour 8)

Alan
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