This adds gate clocks of all System MMUs and their master IPs
that are not apeared in clk-exynos5250.c and clk-exynos5420.c
Also fixes GATE_IP_ACP to 0x18800 and changed GATE_DA to GATE
for System MMU clocks in clk-exynos4.c
Signed-off-by: Cho KyongHo <pullip.cho@xxxxxxxxxxx>
---
.../devicetree/bindings/clock/exynos5250-clock.txt | 3 +++
.../devicetree/bindings/clock/exynos5420-clock.txt | 6 +++++-
drivers/clk/samsung/clk-exynos5250.c | 5 +++++
drivers/clk/samsung/clk-exynos5420.c | 13 +++++++++++--
include/dt-bindings/clock/exynos5250.h | 4 ++++
include/dt-bindings/clock/exynos5420.h | 6 +++++-
6 files changed, 33 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
index 72ce617..67e50ba 100644
--- a/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos5250-clock.txt
@@ -162,6 +162,9 @@ clock which they consume.
g2d 345
mdma0 346
smmu_mdma0 347
+ smmu_tv 348
+ smmu_fimd1 349
+ smmu_2d 350