Re: [PATCH 2/4] KVM: ioapic: clear IRR for edge-triggered interrupts at delivery

From: Alex Williamson
Date: Thu Mar 20 2014 - 16:26:32 EST


On Tue, 2014-03-18 at 15:54 +0100, Paolo Bonzini wrote:
> This ensures that IRR bits are set in the KVM_GET_IRQCHIP result only if
> the interrupt is still sitting in the IOAPIC. After the next patches, it
> avoids spurious reinjection of the interrupt when KVM_SET_IRQCHIP is
> called.
>
> Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx>
> ---
> virt/kvm/ioapic.c | 3 +++
> 1 file changed, 3 insertions(+)

Makes sense

Reviewed-by: Alex Williamson <alex.williamson@xxxxxxxxxx>

> diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c
> index 0b4914147b9d..25e16a6898ed 100644
> --- a/virt/kvm/ioapic.c
> +++ b/virt/kvm/ioapic.c
> @@ -288,6 +288,9 @@ static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
> irqe.level = 1;
> irqe.shorthand = 0;
>
> + if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
> + ioapic->irr &= ~(1 << irq);
> +
> if (irq == RTC_GSI && line_status) {
> BUG_ON(ioapic->rtc_status.pending_eoi != 0);
> ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,



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