Re: [PATCH 1/1] AArch64: TCR_TG1_64K incorrectly sets TCR_EL1 bits [31:30]

[Catalin Marinas]

On Wed, Apr 02, 2014 at 01:38:44PM +0100, Catalin Marinas wrote:
> On Wed, Apr 02, 2014 at 05:00:38AM +0100, Joe Sylve wrote:
> > Section D7.2.83 TCR_EL1, Translation Control Register (EL1) of the
> > latest ARM Architecture Reference Manual, ARMv8, for ARMv8-A states
> > that TCR_EL1 TG1 (bits [31:30]) should be set to 11 for a 64KB
> > TTBR1_EL1 granule size. The mainline 3.14 kernel incorrectly sets
> > those bits to 01 (which is a 16KB granule size).
> > 
> > Signed-off-by: Joe Sylve <joe.sylve@xxxxxxxxx>
> > ---
> > 
> > --- a/arch/arm64/include/asm/pgtable-hwdef.h 2014-04-01 22:13:22.619868978 -0500
> > +++ b/arch/arm64/include/asm/pgtable-hwdef.h 2014-04-01 22:13:58.071869886 -0500
> > @@ -121,7 +121,7 @@
> >  #define TCR_ORGN_MASK ((UL(3) << 10) | (UL(3) << 26))
> >  #define TCR_SHARED ((UL(3) << 12) | (UL(3) << 28))
> >  #define TCR_TG0_64K (UL(1) << 14)
> > -#define TCR_TG1_64K (UL(1) << 30)
> > +#define TCR_TG1_64K (UL(3) << 30)
> >  #define TCR_IPS_40BIT (UL(2) << 32)
> >  #define TCR_ASID16 (UL(1) << 36)
> >  #define TCR_TBI0 (UL(1) << 37)
> 
> According to the spec, 4K pages is also wrong. The strange thing is that
> it works fine on the model. I'll ask internally for clarification
> whether it's a typo in the manual or Linux needs fixing.

You scared me first but the Linux code is *correct* because it sets bit
31 to 1 in proc.S explicitly. The reason is that the code pre-dates the
16K addition to the spec where bit 31 was RES1 and TG0/TG1 were one bit
wide and had the same value. Anyway, it's worth updating the kernel as
at some point will add 16K pages support. Something like below:

--------8<---------------