Re: [PATCH 00/15] ARM: sunxi: add A31 PL pins support

[Maxime Ripard]

On Wed, Apr 09, 2014 at 10:53:13PM +0800, Chen-Yu Tsai wrote:
> Hi Boris,
> 
> On Wed, Apr 9, 2014 at 9:51 PM, Boris BREZILLON
> <boris.brezillon@xxxxxxxxxxxxxxxxxx> wrote:
> > Hello,
> >
> > This series rework the sunxi pinctrl driver to support the PLx pins
> > available on the A31 SoC.
> 
> Thanks for working on this. I mentioned to Maxime on IRC yesterday that
> we have complete pinctrl drivers for both A31 and A23, based on our current
> pinctrl-sunxi driver, in the A23 SDK. These have the complete pin mapping.
> 
> > It also add missing A31 reset controller DT bindings documentation.
> >
> > I need those PL pins (actually I only need PL0 and PL1) to support
> > the P2WI bus, which in turn is used to communicate with the AXP221
> > PMIC.
> 
> If you could, please add all the PL and PM pins.
> As I said, you can find complete definitions in the A23 SDK.

We have no idea what these PM pins are for the A31. And this code only
is of interest for the A31 for the moment. Let's not take into account
the A23 for now as far as the pin definitions are concerned.

> > Let me know if these changes are too intrusive.
> 
> I wonder if we should do a separate driver for the new PIO controller.
> Clearly it's a separate IP block, with it's own clock and reset controls.

It's been merged together in the A23, hence why we did it like that.

> Allwinner sources list this block as "R_PIO". I suggest using this name.
> Clearly "pioL" does not cover all the functionality.

I'd agree with that.


> I have started to document the PRCM block: http://linux-sunxi.org/PRCM

It's quite different on the A31 and on the A23 actually :(

You don't have any of the audio thing for example, but you have the
CPUs power clamp controls, that have been moved to the 

Maxime


-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

Attachment: signature.asc
Description: Digital signature