On Tue, Apr 8, 2014 at 6:27 PM, Stephen Warren <swarren@xxxxxxxxxxxxx> wrote:
On 04/08/2014 05:02 PM, Tim Kryger wrote:Absolutely. If these registers are owned by other drivers, go through them.
On Thu, Apr 3, 2014 at 6:44 AM, Bart Tanghe <bart.tanghe@xxxxxxxxxxxxx> wrote:...
need some recommendationSo the registers for this PWM are located in three distinct memory regions?
the memory mapped io registers of the bcm2835 pwm hardware are spreaded
over the memory mapped io
gpio config 0x20200004 - clk config 0x201010A0 - pwm configuration 0x2020C000
to handle this, I've used the base address of the memory mapped io
so I can use positive offsets
Sorry, I forgot about this patch. One comment here; the PWM driver can't+struct bcm2835_pwm_chip {One pointer isn't going to be enough. You need three.
+ struct pwm_chip chip;
+ struct device *dev;
+ int channel;
+ void __iomem *mmio;
I suggest renaming the first and adding two more:
void __iomem *base_pwm;
void __iomem *base_clk;
void __iomem *base_alt;
touch the clock or alt registers; those should be owned by the clock
driver, and the driver for whatever alt is (pinmux - don't recall what
it's touching there).