On Mon, Apr 28, 2014 at 09:40:23AM +0530, George Cherian wrote:okay
Enable the Annex F Time Sync explicitly for DRA7x and AM4372.L2 works fine without this bit. If this is needed for V3 hardware,
With this enabled the L2 PTP is working.
then it should have its own code variant.
Not for am335x, but for other SoC's it s documented.while at that rename TS_BIT8 to TS_TTL_NONZEROIs this bit finally documented for am335x?
Thanks,
Richard