[PATCH] drm/radeon: fix typo in finding PLL params

[=3D?UTF-8?q?Christian=3D20K=3DC3=3DB6nig?=3D]

Otherwise the limit is raised to high.

Signed-off-by: Christian K=C3=B6nig <christian.koenig@xxxxxxx>
---
 drivers/gpu/drm/radeon/radeon_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/ra=
deon/radeon_display.c
index 408b6ac..f00dbbf 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -999,7 +999,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
=20
 	/* avoid high jitter with small fractional dividers */
 	if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV && (fb_div % 10)) {
-		fb_div_min =3D max(fb_div_min, (9 - (fb_div % 10)) * 20 + 60);
+		fb_div_min =3D max(fb_div_min, (9 - (fb_div % 10)) * 20 + 50);
 		if (fb_div < fb_div_min) {
 			unsigned tmp =3D DIV_ROUND_UP(fb_div_min, fb_div);
 			fb_div *=3D tmp;
--=20
1.9.1


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