Re: [PATCH v2 1/2] watchdog: Add Cadence WDT driver

[Harini Katakam]

Hi Mark,

On Thu, May 29, 2014 at 2:51 PM, Mark Rutland <mark.rutland@xxxxxxx> wrote:
> On Tue, May 27, 2014 at 11:18:14AM +0100, Harini Katakam wrote:
>> Add Cadence WDT driver. This is used by Xilinx Zynq.
>>
>> Signed-off-by: Harini Katakam <harinik@xxxxxxxxxx>
>> ---
>>
>> Sorry for the delay in sending v2.
>> v2 changes:
>> - Update IO helpers.
>> - Use dev_dbg instead of dev_info where possible.
>> - Use watchdog_init_timeout
>> - Spinlock for restart register where missing.
>> - Change order of probe to move reboot notifier register to the end
>> - Remove unecessary comments
>> - Do clk_prepare_enabel and clk_disable_unprepare in resume/suspend
>>   respectively.
>> - There is an input from dts to decide whether internal reset should be
>>   enabled or not. When this is enabled, reset happens wutomatically when
>>   counter reaches zero. In case this is not enabled, a message is disaplayed
>>   to indicate that the watchdog has timed out. Elaborated this message
>>   to describe the above.
>
> When is that useful?
>

Automatic reset enable is an option. When it's not selected, this is a generic
way of giving some indication. If some other action is preferred
instead of reset,
then that can be added here.

Regards,
Harini
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