There is a pthread_spin_lock test in the kyotocabinet package that reproduces
On Mon, 2 Jun 2014, Mikulas Patocka wrote:
On Sun, 1 Jun 2014, John David Anglin wrote:
On 1-Jun-14, at 3:20 PM, Peter Zijlstra wrote:That is strange.
I believe Mikulas is correct. Even in a controlled situation where aIf you write to some variable with ACCESS_ONCE and use cmpxchg or xchg atAnd this is really the first place in the kernel that breaks like this?
the same time, you break it. ACCESS_ONCE doesn't take the hashed spinlock,
so, in this case, cmpxchg or xchg isn't really atomic at all.
I've been using xchg() and cmpxchg() without such consideration for
quite a while.
cmpxchg operation is used to implement pthread_spin_lock() in userspace,
we found recently that the lock must be released with a cmpxchg
operation and not a simple write on SMP systems. There is a race in the
cache operations or instruction ordering that's not present with the
ldcw instruction.
Dave
--
John David Anglin dave.anglin@xxxxxxxx
Spinlock with cmpxchg on lock and a single write on unlock should work,
assuming that cmpxchg doesn't write to the target address when it detects
mismatch (the cmpxchg in the kernel syscall page doesn't do it, it
nullifies the write instruction on mismatch).
Do you have some code that reproduces this misbehavior?
I tried "SYNC" instruction before write and after the cmpxchg operation both
We really need to find out why does it behave this way:
- is PA-RISC really out of order? (we used to believe that it is in-order
and we have empty barrier instructions in the kernel). Does adding the
"SYNC" instruction before the write in pthread_spin_unlock fix it?
I don't see how the processor can perform nullified writes unconditionally although that- does the processor performs nullified writes unconditionally? Does
moving the write in the cmpxchg implementation from the nullified slot
to is own branch fix it?
I had wondered about that. One can't use %r0 as the instruction target as the architecture- does adding a dummy "ldcw" instruction to an unrelated address fix it?
Is it that "ldcw" has some magic barrier properties?
- and there is "stw,o" instruction that does ordered store according toThis doesn't help.
the specification, so we should test it too...
I think we need to perform these tests and maybe some more to find out
what really happened there...
BTW. in Debian 5 libc 2.7, pthread_spin_lock uses ldcw and
pthread_spin_unlock uses a single write (just like the kernel spinlock
implementation). In Debian-ports libc 2.18, both pthread_spin_lock and
pthread_spin_unlock call the kernel syscall page. What was the reason for
switching to a less efficient implementation?
Mikulas