[PATCH 3.14.6 1/1] pinctrl/sh-pfc: fix pfc-r8a7790 pin mux data for IPSR5 bug

[Sathish Kumar Balasubramaniam -ERS, HCL Tech]

From: Sathish Kumar Balasubramaniam <b-sathishkumar@xxxxxxx>

This patch fixes a bug in the list of peripheral functions for the IPSR5 pin mux configuration of the PFC (Pin Function Controller) of the Renesas R-Car H2 SoC (R8A7790). There should be exactly 8 values listed for the IP5_23_21 peripheral function which is using 3 bits. But there are 9 values present in the list.

This bug unexpectedly increases the internal position variable by 1 which is used by the PFC framework to identify the peripheral function. Due to this bug, peripheral function configuration from IP5_20_18 to IP5_2_0 may not work properly.

This issue can be easily reproduced by setting the FN_I2C1_SDA ( IP5_9_6 [4] ) which has the function value of 9 but the actual function value is set as 10 due to this bug.

-------------------------------------------------------------------------------
--- linux-3.14.6/drivers/pinctrl/sh-pfc/pfc-r8a7790.c.original    2014-06-08 22:03:44.681669692 +0530
+++ linux-3.14.6/drivers/pinctrl/sh-pfc/pfc-r8a7790.c    2014-06-08 22:02:10.361673511 +0530
@@ -4624,7 +4624,7 @@ static const struct pinmux_cfg_reg pinmu
         /* IP5_23_21 [3] */
         FN_WE1_N, FN_IERX, FN_CAN1_RX, FN_VI1_G4,
         FN_VI1_G4_B, FN_VI2_R6, FN_SCIFA0_CTS_N_B,
-        FN_IERX_C, 0,
+        FN_IERX_C,
         /* IP5_20_18 [3] */
         FN_WE0_N, FN_IECLK, FN_CAN_CLK,
         FN_VI2_VSYNC_N, FN_SCIFA0_TXD_B, FN_VI2_VSYNC_N_B, 0, 0,


Signed-off-by: Sathish Kumar Balasubramaniam <b-sathishkumar@xxxxxxx>



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