Re: [PATCH] perf/x86/intel: ignore CondChgd bit to avoid false NMI handling

[Matt Fleming]

On Wed, 11 Jun, at 01:54:13PM, Peter Zijlstra wrote:
> 
> Matt found in the MSR listing for GLOBAL_STATUS:
> 
> 63 CondChg: status bits of this register has changed.  If CPUID.0AH: EAX[7:0] > 0
> 
> Which brings us to a grand total of 3 different names for this bit.

Right, I'm flinging emails around to get this fixed in the SDM, so that
the answer to,

Q: "How many kernel developers does it take to find the definition of
this bit?"

is less than 4.

-- 
Matt Fleming, Intel Open Source Technology Center
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/