Re: [PATCH v2 03/18] PCI: designware: Configuration space should be specified in 'reg'
From: Jingoo Han
Date: Wed Jun 18 2014 - 05:27:18 EST
On Wednesday, June 18, 2014 6:15 PM, Kishon Vijay Abraham I wrote:
> On Friday 30 May 2014 07:45 PM, Karicheri, Muralidharan wrote:
> >> On 5/29/2014 2:38 AM, ABRAHAM, KISHON VIJAY wrote:
> >>> The configuration address space has so far been specified in *ranges*,
> >>> however it should be specified in *reg* making it a platform MEM resource.
> >>> Hence used 'platform_get_resource_*' API to get configuration address
> >>> space in the designware driver.
> >>>
> >>> Cc: Jason Gunthorpe <jgunthorpe@xxxxxxxxxxxxxxxxxxxx>
> >>> Cc: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> >>> Cc: Mohit Kumar <mohit.kumar@xxxxxx>
> >>> Cc: Jingoo Han <jg1.han@xxxxxxxxxxx>
> >>> Cc: Marek Vasut <marex@xxxxxxx>
> >>> Cc: Arnd Bergmann <arnd@xxxxxxxx>
> >>> Signed-off-by: Kishon Vijay Abraham I <kishon@xxxxxx>
> >>> ---
> >>> .../devicetree/bindings/pci/designware-pcie.txt | 1 +
> >>> drivers/pci/host/pcie-designware.c | 17 +++++++++++++++--
> >>> 2 files changed, 16 insertions(+), 2 deletions(-)
[...]
> >>> + cfg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "config");
> >>> + if (cfg_res) {
> >>> + pp->config.cfg0_size = resource_size(cfg_res)/2;
> >>> + pp->config.cfg1_size = resource_size(cfg_res)/2;
> >>> + pp->cfg0_base = cfg_res->start;
> >>> + pp->cfg1_base = cfg_res->start + pp->config.cfg0_size;
> >>> + } else {
> >>> + dev_err(pp->dev, "missing *config* reg space\n");
> >> This should return error -EINVAL.
>
> Just read the other thread and Grant Likely suggested the host controller
> driver should be backward compatible [1]. So we can't return -EINVAL here.
> So I'd assume this patch is fine as is? Arnd? Jingoo?
Yes, you're right. The driver should keep backward compatibility for
legacy DT binding. However, after enough time goes by, these legacy
DT handling can be removed.
Best regards,
Jingoo Han
>
> [1] -> https://lkml.org/lkml/2014/6/3/124
>
> Thanks
> Kishon
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