Re: [PATCH v2 9/9] KVM: vmx: vmx instructions handling does not consider cs.l
From: Nadav Amit
Date: Wed Jun 18 2014 - 12:02:00 EST
On 6/18/14, 6:41 PM, Paolo Bonzini wrote:
Il 18/06/2014 16:19, Nadav Amit ha scritto:
VMX instructions use 32-bit operands in 32-bit mode, and 64-bit
operands in
64-bit mode. The current implementation is broken since it does not
use the
register operands correctly, and always uses 64-bit for reads and writes.
Moreover, write to memory in vmwrite only considers long-mode, so it
ignores
cs.l. This patch fixes this behavior. The field of vmread/vmwrite is
kept
intentionally as 64-bit read since if bits [63:32] are not cleared the
instruction should fail, according to Intel SDM.
This is not how I read the SDM:
"These instructions fail if given, in 64-bit mode, an operand that sets
an encoding bit beyond bit 32." (Section 24.11.1.2)
"Outside IA-32e mode, the source operand has 32 bits, regardless of the
value of CS.D. In 64-bit mode, the source operand has 64 bits; however,
if bits 63:32 of the source operand are not zero, VMREAD will fail due
to an attempt to access an unsupported VMCS component (see operation
section)." (Description of VMREAD in Chapter 30).
I'll fix up the patch myself.
Perhaps I am missing something, but I don't see where my mistake is.
The VMREAD source operand is always read as 64-bits and I made no
changes there. Therefore, if bits 63:32 are not zero, the instruction
should fail when attempting to access the field.
The value in the source operand of VMWRITE which represents the value
which should be written is zero-extended outside 64-bit mode.
Quoting: "The effective size of the primary source operand, which may be
a register or in memory, is always 32 bits outside IA-32e mode (the
setting of CS.D is ignored with respect to operand size) and 64 bits in
64-bit mode." (Description of VMWRITE in chapter 30).
Regards,
Nadav
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