RE: [RFC PATCH 1/2] spi: Add support for Zynq QSPI controller

From: Punnaiah Choudary Kalluri
Date: Thu Jul 10 2014 - 05:45:03 EST

HI Greet,

>-----Original Message-----
>From: Harini Katakam [mailto:harinikatakamlinux@xxxxxxxxx]
>Sent: Thursday, July 10, 2014 3:01 PM
>To: Geert Uytterhoeven
>Cc: Mark Brown; Grant Likely; Rob Herring; Pawel Moll; Mark Rutland; Ian
>Campbell; Kumar Gala; linux-spi; linux-kernel@xxxxxxxxxxxxxxx;
>devicetree@xxxxxxxxxxxxxxx; linux-doc@xxxxxxxxxxxxxxx; David Woodhouse;
>Brian Norris; Marek VaÅut; Artem Bityutskiy; Geert Uytterhoeven; Sascha
>Hauer; Jingoo Han; Sourav Poddar; Michal Simek; Punnaiah Choudary Kalluri
>Subject: Re: [RFC PATCH 1/2] spi: Add support for Zynq QSPI controller
>Hi Geert,
>On Thu, Jul 10, 2014 at 2:48 PM, Geert Uytterhoeven
><geert@xxxxxxxxxxxxxx> wrote:
>> Hi Harini,
>> On Thu, Jul 10, 2014 at 10:50 AM, Harini Katakam <harinik@xxxxxxxxxx>
>>> + master->flags = SPI_MASTER_QUAD_MODE;
>> SPI_MASTER_QUAD_MODE is not one of the SPI_MASTER_* defines
>> in include/linux/spi/spi.h?
>I'm sorry about that. That flag is unused - will remove this statement.
>>> + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL |
>> Your driver advertises Dual/Quad SPI Transfer capabilities, but it doesn't
>> check spi_transfer.[tr]x_nbits? How can it determine when to enable
>Here the driver is just giving information that the controller support it.
>The MTD layer enables dual/quad based on what the flash supports; quad
>being the first priority
>I understand that the spi core reads rx, tx-bus-width property and
>master support flags and
>performs the necessary checks.

Just to add, the zynq qspi controller will automatically select the IO lines based
On the flash command.


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