[PATCH] MIPS: bugfix: missed cache flush of TLB refill handler

From: Leonid Yegoshin
Date: Fri Jul 11 2014 - 18:18:22 EST


Commit 1d40cfcd3442a53e98468cdb3e6d4d9a568d76cf
Author: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Date: Fri Jul 15 15:23:23 2005 +0000

Avoid SMP cacheflushes. This is a minor optimization of startup but
will also avoid smp_call_function from doing stupid things when called
from a CPU that is not yet marked online.

missed an appropriate cache flush of TLB refill handler because that time it was
at fixed location CAC_BASE. After years the refill handler in EBASE vector
is not at that location and can be allocated in some another memory and needs
I-cache sync as other TLB exception vectors.

Besides that, the new function - local_flash_icache_range() was introduced
to avoid SMP cacheflushes.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@xxxxxxxxxx>
arch/mips/mm/tlbex.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index e80e10b..661bc3d 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -429,6 +429,7 @@ static void build_r3000_tlb_refill_handler(void)
(unsigned int)(p - tlb_handler));

memcpy((void *)ebase, tlb_handler, 0x80);
+ local_flush_icache_range(ebase, ebase + 0x80);

dump_handler("r3000_tlb_refill", (u32 *)ebase, 32);
@@ -1415,6 +1416,7 @@ static void build_r4000_tlb_refill_handler(void)

memcpy((void *)ebase, final_handler, 0x100);
+ local_flush_icache_range(ebase, ebase + 0x100);

dump_handler("r4000_tlb_refill", (u32 *)ebase, 64);

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