Hello JiÅÃ,Sorry for that.
First of all, please try to use git format-patch when submitting a
patch to any kernel mailing list.
For chip select, but #3. And when SPI communicate with cs0 (PA22), it goes down too (PA14), so 2 devices on bus were selected.
On Thu, 24 Jul 2014 15:38:24 +0200
JiÅÃ Prchal <jiri.prchal@xxxxxxxxxxx> wrote:
After ROMBOOT tries boot from flash on SPI0 NPCS0, this NPCS0 (PA14) remains set to PERIPH_A.
Because of that, this pin is unusable to something else.
This patch sets it back to GPIO.
The policy is to leave pins in an unknown state till some peripheral
need them.
What are you trying to use this pin for ?
If you just want to use it as a chip select for an spi device, take aAt [1] it's OK until as cs0 is for example PA22 and cs1 is PA14.
look at [1].
GPIO is not set in driver as GPIO, at least I didn't find it.
Here the gpio is requested by the spi core when defining the cs-gpios
property. The gpio controller then request the listed pins to the pin
controller (pinctrl driver).
--
You can explicitly define a new pinctrl state (by defining a new
pinctrl_spi0_cs0 subnode in your dts file) and reference it in the
spi0 node, though this is not mandatory.
Best Regards,
Boris
[1]http://lxr.free-electrons.com/source/arch/arm/boot/dts/at91sam9x5ek.dtsi#L85