So, what would be the right fix up? I my patch it's not good idea since some other driver can request pin for other peripheral earlier than spi. In board dts it could be new investigating for someone else who don't know this issue. I think the best way would be request all cs in early spi init since cs depends on each other and must be all of them in right state before any communication on bus. They are part of bus, like miso, mosi, clk, not part of chips. Also they are defined in parent spi node, not in child chip node./ # devmem 0xfffff408
/ # devmem 0xfffff418
/ # devmem 0xfffff438
/ # devmem 0xfffff43c
/ # devmem 0xfffff458
/ # devmem 0xfffff468
/ # devmem 0xfffff470
/ # devmem 0xfffff474
/ # devmem 0xfffff498
I get thought if is possible that in time of probe fm25 (it's first) is not configured PA14 (it 's last)?
Oh, nice catch!
I think you've found the origin of this bug.
Indeed each device is instantiated sequentially and thus when the first
device is probed (CS0) the last one has not requested it's cs_gpio yet
(and PA14 is still assigned to periph A).
Declaring cs-pins and referencing them in pinctrl-0 solves the issue
because in this case all CS pins are requested during controller probe.