Re: [PATCH] clk: ti: clk-7xx: Correct ABE DPLL configuration

From: Tero Kristo
Date: Thu Jul 31 2014 - 02:35:46 EST

On 07/31/2014 01:42 AM, Mike Turquette wrote:
Quoting Tero Kristo (2014-07-30 05:27:07)
On 07/30/2014 08:53 AM, Peter Ujfalusi wrote:
On 07/29/2014 07:12 PM, Mike Turquette wrote:
Oh yea, seems this got lost into the myriad of branches I have. I can push
this on top of my for-v3.17/ti-clk-drv if you like.

That is the easiest thing for me. I think that Peter wanted to take
this as a fix for 3.16 though. Peter is that correct?

Yes, it would have been better to have it in 3.16 along with the DRA7 ATL
clock driver. W/O this patch the ATL will not going to be usable since the ABE
DPLL is set too high to be usable for it's purpose.

Ok, this is now pushed on top of the for-v3.17/ti-clk-driver branch in
my git-repo. Mike, do you want a new pull-req for this just in case?

I've picked it manually and applied on top of 3.16-rc7 for a last minute
fix. I can add your Ack if you like.

Ok thanks, Add my ack if you wish, no need from my side.

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