Re: [PATCH 4/4 V3] irqchip: gicv2m: Add support for multiple MSI for ARM64 GICv2m
From: Suravee Suthikulanit
Date: Fri Aug 01 2014 - 10:37:17 EST
On 7/30/2014 10:16 AM, Marc Zyngier wrote:
Why do we need this complexity at all? Is there any case where we'd want
to limit ourselves to a single vector for MSI?
I think the ARM64 GICv2m should not be the limitation for the devices
multiple MSI if there is no real hardware/design limitation.
arm64 is a new enough architecture so that we can expect all interrupt controllers to cope
with that.
I am not sure if I understand this comment.
We are not forcing all interrupt controllers for ARM64 to handle
multi-MSI. They have the option to support if multi-MSI if they want
to. I just think that we should not put the architectural limit here.
Thanks,
Suravee
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/