Re: [PATCH v4 2/4] usb: dwc2: add compatible data for rockchip soc

[Doug Anderson]

Paul,

On Thu, Aug 7, 2014 at 11:26 AM, Paul Zimmerman
<Paul.Zimmerman@xxxxxxxxxxxx> wrote:
>> From: Kever Yang [mailto:kever.yang@xxxxxxxxx] On Behalf Of Kever Yang
>> Sent: Thursday, August 07, 2014 2:35 AM
>>
>> This patch add compatible data for dwc2 controller found on
>> rk3066, rk3188 and rk3288 processors from rockchip.
>>
>> Signed-off-by: Kever Yang <kever.yang@xxxxxxxxxxxxxx>
>> Acked-by: Paul Zimmerman <paulz@xxxxxxxxxxxx>
>> ---
>>
>> Changes in v4:
>> - max_transfer_size change to 65536, this should be enough
>>   for most transfer, the hardware auto-detect will set this
>>   to 0x7ffff which may make dma_alloc_coherent fail when
>>   non-dword aligned buf from driver like usbnet happen.
>
> Hi Kever,
>
> Did you test this change thoroughly? I have vague memories of any
> value above 65535 causing problems, at least on my hardware. And I
> see it is set to 65535 in both pci.c and platform.c. I could be
> wrong, but I thought I should mention it.

Certainly it is documented in the header file to have a max of 65535:

 * @max_transfer_size:  The maximum transfer size supported, in bytes
 *                       2047 to 65,535
 *                      Actual maximum value is autodetected and also
 *                      the default.

...but looking at the register definition that I see, the size can be
up to 19 bits.  A 19-bit transfer far exceeds 65535.  Do you remember
what the error was?  Certainly I can imagine there being errors with
large calls to dma_alloc_coherent()...

I know that with Kever's change I can do USB Ethernet downloads, so it
is at least working to some degree.  ...to me it feels like Kever
should resubmit with 65535 (to match the documentation) and then work
in the background to figure out what the max_transfer_size really
ought to be.

-Doug
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