Re: [PATCH v2] tps65910: Work around silicon erratum SWCZ010
From: Arnout Vandecappelle
Date: Tue Aug 26 2014 - 12:21:36 EST
On 08/26/14 12:14, Laxman Dewangan wrote:
> Because this patch is dropped from Mark's tree, here is opportunity to revisit
> patch.
>
> On Friday 22 August 2014 09:00 PM, Arnout Vandecappelle (Essensium/Mind) wrote:
>> From http://www.ti.com/lit/pdf/SWCZ010 :
>>
>>
>> Workaround:
>> Repeat I2C access.
>
>> A simpler workaround is to make a dummy transfer just before the first
>> access to the tps65910 chip. This can be done unconditionally.
>> >id = chip_id;
>> + /* Work around silicon erratum SWCZ010: the tps65910 may miss the
>> + * first I2C transfer. So issue a dummy transfer before the first
>> + * real transfer.
>> + */
>> + i2c_master_send(i2c, "", 1);
>
> I think dummy read is more safe operation than dummy write.
> Dummy write can create the write on any register which can damage the critical
> settings or it may be possible that it will be incomplete calls. Datasheet has
> not been explained this clearly.
We're just sending the register address 0 of the SMBus transfer, without an
actual read/write request. If we do an i2c_master_recv, it's not a valid SMBus
transfer so we're equally unsure about how the chip will react to that.
But if you like, I can check how the chip reacts to it - most likely it'll just
ignore it, possibly it won't even ack it.
Regards,
Arnout
--
Arnout Vandecappelle arnout at mind be
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Essensium/Mind http://www.mind.be
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