Re: [PATCH 2/3] x86: Enable PAT to use cache mode translation tables

From: Juergen Gross
Date: Fri Aug 29 2014 - 00:08:23 EST


On 08/29/2014 01:21 AM, Toshi Kani wrote:
On Tue, 2014-08-26 at 08:16 +0200, Juergen Gross wrote:
Update the translation tables from cache mode to pgprot values according to
the PAT settings. This enables changing the cache attributes of a PAT index in
just one place without having to change at the users side.

With this change it is possible to use the same kernel with different PAT
configurations, e.g. supporting Xen.

Signed-off-by: Juergen Gross <jgross@xxxxxxxx>

I know I sent my review-by before, but my build test failed...

diff --git a/include/linux/mm.h b/include/linux/mm.h
index 8981cc8..d7bf551 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -1574,6 +1574,7 @@ extern void free_area_init(unsigned long * zones_size);
extern void free_area_init_node(int nid, unsigned long * zones_size,
unsigned long zone_start_pfn, unsigned long *zholes_size);
extern void free_initmem(void);
+extern void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache);

This new interface cannot be defined in this common header file since
page_cache_mode is only defined in x86. It should be defined in x86
header, such as pat.h.

Oh, right you are.

Thanks,

Juergen

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