[PATCH v2 3/3] ARM: dts: exynos: Add sysreg phandle to ADC node

From: Naveen Krishna Chatradhi
Date: Tue Sep 16 2014 - 05:03:56 EST


Instead of using the ADC_PHY register base address, use sysreg phandle
in ADC node to control ADC_PHY configuration register.

This patch adds syscon node for Exynos3250, Exynos4x12, Exynos5250,
and Exynos5420, Exynos5800.

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@xxxxxxxxxxx>
To: linux-samsung-soc@xxxxxxxxxxxxxxx
---
arch/arm/boot/dts/exynos3250.dtsi | 3 ++-
arch/arm/boot/dts/exynos4x12.dtsi | 3 ++-
arch/arm/boot/dts/exynos5250.dtsi | 3 ++-
arch/arm/boot/dts/exynos5420.dtsi | 3 ++-
4 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 1d52de6..b997a4c 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -272,12 +272,13 @@
adc: adc@126C0000 {
compatible = "samsung,exynos3250-adc",
"samsung,exynos-adc-v2";
- reg = <0x126C0000 0x100>, <0x10020718 0x4>;
+ reg = <0x126C0000 0x100>;
interrupts = <0 137 0>;
clock-names = "adc", "sclk";
clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
#io-channel-cells = <1>;
io-channel-ranges;
+ samsung,syscon-phandle = <&pmu_system_controller>;
status = "disabled";
};

diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index 861bb91..9ee77d3 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -108,13 +108,14 @@

adc: adc@126C0000 {
compatible = "samsung,exynos-adc-v1";
- reg = <0x126C0000 0x100>, <0x10020718 0x4>;
+ reg = <0x126C0000 0x100>;
interrupt-parent = <&combiner>;
interrupts = <10 3>;
clocks = <&clock CLK_TSADC>;
clock-names = "adc";
#io-channel-cells = <1>;
io-channel-ranges;
+ samsung,syscon-phandle = <&pmu_system_controller>;
status = "disabled";
};

diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 492e1ef..108adc5 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -765,12 +765,13 @@

adc: adc@12D10000 {
compatible = "samsung,exynos-adc-v1";
- reg = <0x12D10000 0x100>, <0x10040718 0x4>;
+ reg = <0x12D10000 0x100>;
interrupts = <0 106 0>;
clocks = <&clock CLK_ADC>;
clock-names = "adc";
#io-channel-cells = <1>;
io-channel-ranges;
+ samsung,syscon-phandle = <&pmu_system_controller>;
status = "disabled";
};

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index bfe056d..5fd587a 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -541,12 +541,13 @@

adc: adc@12D10000 {
compatible = "samsung,exynos-adc-v2";
- reg = <0x12D10000 0x100>, <0x10040720 0x4>;
+ reg = <0x12D10000 0x100>;
interrupts = <0 106 0>;
clocks = <&clock CLK_TSADC>;
clock-names = "adc";
#io-channel-cells = <1>;
io-channel-ranges;
+ samsung,syscon-phandle = <&pmu_system_controller>;
status = "disabled";
};

--
1.7.9.5

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