From: Giuseppe CAVALLARO [mailto:peppe.cavallaro@xxxxxx]
Sent: Tuesday, September 23, 2014 2:10 PM
the logic is: the priv->stmmac_clk must be always provided from the platform
then we have two cases:
1) if priv->plat->clk_csr is also passed then it will be adopt in the
mdio functions to program the Reg4[5:2]
This was required in the past IIRC on SPEAr platforms.
2) if priv->plat->clk_csr is not passed from the platform then the
priv->clk_csr will be set according to the priv->stmmac_clk
and always used in the mdio part.
So IIUC now you are asking for not passing the priv->stmmac_clk and warning
this event w/o failing. Why you cannot pass this clock?
Appreciate for the explanation. Just to clarify that I am not asking not to pass in the priv->stmmac_clk.
In fact, the fix will fail at case 2 if driver cannot obtain the priv->stmmac_clk, but just not the case 1.
For case 1, seem like it does not require the stmmac_clk then I think it should be OK not to fail it when
driver did not get stmmac_clk but have the clk_csr set.
Anyway, I can change the fix by adding the clock registration APIs being call at the stmmac_pci.c probe there before
calling stmmac_dvr_probe. By doing this, it created a dependency to the pci driver that must have CONFIG_HAVE_CLK
to be turned on. Besides, I would need you guys to provide me information on other platforms about what is the best
value to set? Can I just set to zero since the stmmac_pci driver is always using the priv->plat->clk_csr?