Re: [PATCH] x86: Quark: Flush TLB via CR3 not CR4.PGE in setup_arch()

From: Bryan O'Donoghue
Date: Thu Sep 25 2014 - 05:36:48 EST

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 41ead8d..1d2396a 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -879,7 +879,10 @@ void __init setup_arch(char **cmdline_p)

- __flush_tlb_all();
+ if (boot_cpu_data.x86 == 5 && boot_cpu_data.x86_model == 9)
+ __flush_tlb();
+ else
+ __flush_tlb_all();

So why not make __flush_tlb_all() Quark-quirk-aware and be done
with it, instead of having to validate every single
__flush_tlb_all() user?

Quark breaks the x86 'flush all TLBs' semantics - the way to fix
it is to restore those semantics, not to sprinkle the breakage
all around the code ...

Hi Ingo.

We have made __flush_tlb_all() Quark aware - because the previous patch we applied to arch/x86/kernel/cpu/intel.c


+ if (c->x86 == 5 && c->x86_model == 9) {
+ pr_info("Disabling PGE capability bit\n");
+ setup_clear_cpu_cap(X86_FEATURE_PGE);
+ }

will cause cpu_has_pge() to be false and then the flush_tlb_all code will take the path we want __flush_tlb not __flush_tlb_global

static inline void __flush_tlb_all(void)
if (cpu_has_pge)

The code in setup_arch runs before the cpu_has_pge bit been clobbered.

The commit you did 02276a3a677d681f0cd227d7111c71fdbce23832 just adds a comment to setup_arch to indicate the behaviour we are relying on


load_cr3(swapper_pg_dir); /* this will flush the TLB on Quark */
__flush_tlb_all(); /*cpu_has_pge() is true at this point*/


/* this is where we latch the cpu cabability bits */

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