[PATCH 3.12 133/142] drm/i915: read HEAD register back in init_ring_common() to enforce ordering
From: Jiri Slaby
Date: Fri Sep 26 2014 - 05:51:25 EST
From: Jiri Kosina <jkosina@xxxxxxx>
3.12-stable review patch. If anyone has any objections, please let me know.
commit ece4a17d237a79f63fbfaf3f724a12b6d500555c upstream.
Withtout this, ring initialization fails reliabily during resume with
[drm:init_ring_common] *ERROR* render ring initialization failed ctl 0001f001 head ffffff8804 tail 00000000 start 000e4000
This is not a complete fix, but it is verified to make the ring
initialization failures during resume much less likely.
We were not able to root-cause this bug (likely HW-specific to Gen4 chips)
yet. This is therefore used as a ducttape before problem is fully
understood and proper fix created, so that people don't suffer from
completely unusable systems in the meantime.
The discussion and debugging is happening at
Signed-off-by: Jiri Kosina <jkosina@xxxxxxx>
Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
Signed-off-by: Jiri Slaby <jslaby@xxxxxxx>
drivers/gpu/drm/i915/intel_ringbuffer.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 7507fe036b6e..1ceb95a3bbe0 100644
@@ -423,6 +423,9 @@ static int init_ring_common(struct intel_ring_buffer *ring)
+ /* Enforce ordering by reading HEAD register back */
/* Initialize the ring. This must happen _after_ we've cleared the ring
* registers with the above sequence (the readback of the HEAD registers
* also enforces ordering), otherwise the hw might lose the new ring
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