Re: [PATCH] x86, setup: add __flush_tlb() for Intel Quark X1000

From: Bryan O'Donoghue
Date: Fri Sep 26 2014 - 13:22:32 EST

On 26/09/14 16:00, Bryan O'Donoghue wrote:
+ /*
+ * Locate the page directory and flush the TLB.
+ *
+ * On Quark X1000 CPUs we still have the PGE bit incorrectly set
+ * due to a processor erratum, so __flush_tlb_all() is not yet
+ * doing what it says. Fortunately we have a cr3 flush here,
+ * which is what is needed in this processor to flush TLBs, so
+ * there's no need to add a Quark X1000 quirk here.
+ *
+ * early_init_intel will unset the X86_FEATURE_PGE flag later
+ * and __flush_tlb_all() will flush via cr3
+ */
+ __flush_tlb();

With the extra __flush_tlb(); on the end.

Scatch that.

ACK Ong Boon Leong's patch


At the risk of contradicting myself in public I had a think about this on the drive home and ...

As I see it - the reload @ CR3 should have flushed the TLB. That's what the documentation says.

Right now with the proposed patch from Ong Boon Leong the code will be


While there may be no *harm* in adding an extra __flush_tlb(); - there's not much *sense* in it either.

If however there's a strong feeling that an explicit __flush_tlb() is required in Quark's case then - I believe the code should revert to the original logic from the Quark BSP namely.

+ if (boot_cpu_data.x86 == 5 && boot_cpu_data.x86_model == 9)
+ __flush_tlb();
+ else
+ __flush_tlb_all();

This was Peter's initial suggestion in any case and as I see it the right-thing-to-do rather than have another reduntant __flush_tlb() for everybody who's not Quark.

How does that make sense ?

I can't imagine it's preferable to do a __flush_tlb(); on *x86 for the sake of skipping an if/else

I'll resubmit that now with Ong Boon's commentary.

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