Re: [PATCH v2] staging: Add Xilinx Clocking Wizard driver

[SÃren Brinkmann]

On Thu, 2014-10-02 at 02:19AM +0300, Laurent Pinchart wrote:
> Hi SÃren,
> 
> Thank you for the patch.
> 
> On Wednesday 01 October 2014 14:02:32 Soren Brinkmann wrote:
> > Add a driver for the Xilinx Clocking Wizard soft IP. The clocking wizard
> > provides an AXI interface to dynamically reconfigure the clocking
> > resources of Xilinx FPGAs.
> > 
> > Signed-off-by: Soren Brinkmann <soren.brinkmann@xxxxxxxxxx>
> > ---
> > Hi Greg, Dan,
> > 
> > I fixed the things Dan pointed out, please take this v2 instead of the
> > original patch.
> > 
> > Also, don't get caught up too much with style issues around the code that
> > registers the clocks. To support set_rate() opeartions this will have to
> > change anyway. It doesn't make a lot of sense to spend much time on those
> > parts.
> > 
> > 	Thanks,
> > 	SÃren
> > 
> > v2:
> >  - implement dev_pm_ops
> >  - don't use array for clock inputs
> >  - add more information in error output
> >  - fix style issues
> >  - fix error path
> > ---
> >  drivers/staging/Kconfig                            |   2 +
> >  drivers/staging/Makefile                           |   1 +
> >  drivers/staging/clocking-wizard/Kconfig            |   9 +
> >  drivers/staging/clocking-wizard/Makefile           |   1 +
> >  drivers/staging/clocking-wizard/TODO               |  12 +
> >  .../clocking-wizard/clk-xlnx-clock-wizard.c        | 336 ++++++++++++++++++
> >  drivers/staging/clocking-wizard/dt-binding.txt     |  30 ++
> >  7 files changed, 391 insertions(+)
> >  create mode 100644 drivers/staging/clocking-wizard/Kconfig
> >  create mode 100644 drivers/staging/clocking-wizard/Makefile
> >  create mode 100644 drivers/staging/clocking-wizard/TODO
> >  create mode 100644 drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c
> >  create mode 100644 drivers/staging/clocking-wizard/dt-binding.txt
> 
> [snip]
> 
> > diff --git a/drivers/staging/clocking-wizard/dt-binding.txt
> > b/drivers/staging/clocking-wizard/dt-binding.txt new file mode 100644
> > index 000000000000..cc3cc5e91440
> > --- /dev/null
> > +++ b/drivers/staging/clocking-wizard/dt-binding.txt
> > @@ -0,0 +1,30 @@
> > +Binding for Xilinx Clocking Wizard IP Core
> > +
> > +This binding uses the common clock binding[1]. Details about the devices
> > can be +found in the product guide[2].
> > +
> > +[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
> > +[2] Clocking Wizard Product Guide
> > +http://www.xilinx.com/support/documentation/ip_documentation/clk_wiz/v5_1/p
> > g065-clk-wiz.pdf +
> > +Required properties:
> > + - compatible: Must be 'xlnx,clocking-wizard'
> > + - reg: Base and size of the cores register space
> > + - clocks: Handle to input clock
> > + - clock-names: Tuple containing 'clk_in1' and 's_axi_aclk'
> > + - clock-output-names: Names for the output clocks
> > +
> > +Optional properties:
> > + - speed-grade: Speed grade of the device
> 
> You should document what values are allowed.

Will do.

> > +
> > +Example:
> > +	clock-generator@40040000 {
> > +		reg = <0x40040000 0x1000>;
> > +		compatible = "xlnx,clocking-wizard";
> > +		speed-grade = <(-1)>;
> 
> Can't we make the speed grade positive ? It looks to me that the - is nowadays 
> a dash and not a minus sign, given that higher absolute values of the speed 
> grade mean faster devices. The days when the speed grate represented the 
> propagation time of signals in ns is long gone I suppose.

Fine with me.

	Thanks,
	SÃren
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