[PATCH] clk: Neaten clk_summary output even more

[Stefan Agner]

Some SoC have lots of clock gates, mux and divider options and hence
a deep clock tree. This patch makes more room for the clock name as
well as decreases the indent per level from 3 to 2 spaces.

Signed-off-by: Stefan Agner <stefan@xxxxxxxx>
---
Before:
...
                      sys_sel                   1            1   500210526          0
                         sys_bus                2            2   500210526          0
                            platform_bus           7            7   166736842          0
                               dmamux3           1            1   166736842          0
                               dmamux2           1            1   166736842          0
                               dmamux1           1            1   166736842          0
                               dmamux0           1            1   166736842          0
                               esdhc1_sel           0            0   166736842          0
                                  esdhc1_en           0            0   166736842          0
                                     esdhc1_div           0            0   166736842          0
                                        eshc1           0            0   166736842          0

After:
...
                 sys_sel                     1         1   500210526          0
                   sys_bus                   2         2   500210526          0
                     platform_bus            7         7   166736842          0
                       dmamux3               1         1   166736842          0
                       dmamux2               1         1   166736842          0
                       dmamux1               1         1   166736842          0
                       dmamux0               1         1   166736842          0
                       esdhc1_sel            0         0   166736842          0
                         esdhc1_en           0         0   166736842          0
                           esdhc1_div        0         0   166736842          0
                             eshc1           0         0   166736842          0

 drivers/clk/clk.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index b76fa69..7018815 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -117,9 +117,9 @@ static void clk_summary_show_one(struct seq_file *s, struct clk *c, int level)
 	if (!c)
 		return;
 
-	seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu\n",
-		   level * 3 + 1, "",
-		   30 - level * 3, c->name,
+	seq_printf(s, "%*s%-*s %7d %9d %11lu %10lu\n",
+		   level * 2 + 1, "",
+		   37 - level * 2, c->name,
 		   c->enable_count, c->prepare_count, clk_get_rate(c),
 		   clk_get_accuracy(c));
 }
@@ -143,7 +143,7 @@ static int clk_summary_show(struct seq_file *s, void *data)
 	struct clk *c;
 	struct hlist_head **lists = (struct hlist_head **)s->private;
 
-	seq_puts(s, "   clock                         enable_cnt  prepare_cnt        rate   accuracy\n");
+	seq_puts(s, " clock                                  en_cnt  prep_cnt        rate   accuracy\n");
 	seq_puts(s, "--------------------------------------------------------------------------------\n");
 
 	clk_prepare_lock();
-- 
2.1.2

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