Re: [PATCH 4/4] edac, amd64_edac: Add F15h M60h support

[Aravind Gopalakrishnan]

On 10/1/2014 10:45 AM, Borislav Petkov wrote:
> On Wed, Oct 01, 2014 at 10:32:58AM -0500, Aravind Gopalakrishnan wrote:
> > > > +			if (dcsm & 0x3) {
> > > > +				/* LRDIMMs */
> > > > +				edac_dbg(1, "  DIMM type: LRDIMM %dx rank multiply;"
> > > > +					 "CS = %d; all DIMMs support ECC: %s\n",
> > > > +					 (dcsm & 0x3), cs,
> > > > +					 (dclr & BIT(19)) ? "yes" : "no");
> > > Why do we need to iterate over the DRAM CS sets? Just for the rank
> > > multiplier, apparently. We dump those normally in read_dct_base_mask(),
> > > though.
> > It's not just for rank multiplier.. we find that it's LRDIMM only by
> > examining dcsm. Hence the iteration here..
> So we can look only at the first DCSM, no? Or are there systems with
> different types of LRDIMMs on one DCT?

So it seems we can theoretically have systems in this manner, but that 
is not a common case..

So, shall I just use first DCSM to keep it simple for now?
And find rank multiplier iteratively as and when need arises?

Thanks,
-Aravind.
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