Re: [PATCH 2/2] spi: fsl-spi: Allow dynamic allocation of CPM1 parameter RAM

[christophe leroy]

Le 03/10/2014 22:24, Scott Wood a Ãcrit :
> On Fri, 2014-10-03 at 22:15 +0200, christophe leroy wrote:
> > Le 03/10/2014 16:44, Mark Brown a Ãcrit :
> > > On Fri, Oct 03, 2014 at 02:56:09PM +0200, Christophe Leroy wrote:
> > >
> > > > +config CPM1_RELOCSPI
> > > > +	bool "Dynamic SPI relocation"
> > > > +	default n
> > > > +	help
> > > > +	  On recent MPC8xx (at least MPC866 and MPC885) SPI can be relocated
> > > > +	  without micropatch. This activates relocation to a dynamically
> > > > +	  allocated area in the CPM Dual port RAM.
> > > > +	  When combined with SPI relocation patch (for older MPC8xx) it avoids
> > > > +	  the "loss" of additional Dual port RAM space just above the patch,
> > > > +	  which might be needed for example when using the CPM QMC.
> > > Something like this shouldn't be a compile time option.  Either it
> > > should be unconditional or it should be triggered in some system
> > > specific manner (from DT, from knowing about other users or similar).
> > Can't be unconditional as older versions of mpc8xx (eg MPC860) don't
> > support relocation without a micropatch.
> > I have therefore submitted a v2 based on a DTS compatible property.
> So the device tree change is about whether relocation is supported, not
> whether it is required?
Indeed no, my intension is to say that relocation is requested. Do you 
mean that it should then not use a compatible ?
> Is this specific to SPI or does the relocation
> mechanism work for other things?
Relocation is the same for I2C.

It is also possible to relocate SMC1 and SMC2 parameter RAM but only 
with a micropatch.
Today, the kernel only implements relocation of SMC1, and it relocates 
it at a fixed address just after SMC2 at offset 0x1FC0.
> How about checking for the existing specific-SoC compatibles?
What do you mean ?

Christophe

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