Re: [PATCH v2 2/2] Documentation: dmaengine: Add a documentation for the dma controller API

From: Geert Uytterhoeven
Date: Thu Oct 09 2014 - 09:39:44 EST

On Tue, Oct 7, 2014 at 4:52 PM, Maxime Ripard
<maxime.ripard@xxxxxxxxxxxxxxxxxx> wrote:
>> >> +These various types will also affect how the source and destination
>> >> +addresses change over time, as DMA_SLAVE transfers will usually have
>> >> +one of the addresses that will increment, while the other will not,
>> >> +DMA_CYCLIC will have one address that will loop, while the other, will
>> >
>> > s/the other,/the other/
>> >
>> >> +not change, etc.
>> This is a little bit vague in my opinion. And usually, it is pretty
>> implementation specific.
> Which is why we can't really be more precise. If you have any other
> wording coming to your mind, I'm all for it :)


Addresses pointing to RAM are typically incremented (or decremented) after
each transfer. In case of a ring buffer, they may loop (DMA_CYCLIC).
Addresses pointing to a device's register (e.g. a FIFO) are typically fixed.



Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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