Re: [PATCH V2 06/15] genirq: Generic chip: Optimize for fixed-endian systems

From: Brian Norris
Date: Thu Oct 30 2014 - 00:17:30 EST


On Wed, Oct 29, 2014 at 07:17:59PM -0700, Kevin Cernekee wrote:
> @@ -19,7 +20,14 @@ static DEFINE_RAW_SPINLOCK(gc_lock);
>
> static int is_big_endian(struct irq_chip_generic *gc)
> {
> - return !!(gc->domain->gc->gc_flags & IRQ_GC_BE_IO);
> + if (IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP) &&
> + !IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP_BE))
> + return 0;
> + else if (IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP_BE) &&
> + !IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP))
> + return 1;

Would XOR make this any easier to read? e.g.:

if (IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP) ^
IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP_BE))
return IS_ENABLED(CONFIG_GENERIC_IRQ_CHIP_BE);
else
...

> + else
> + return !!(gc->domain->gc->gc_flags & IRQ_GC_BE_IO);
> }
>
> static void irq_reg_writel(struct irq_chip_generic *gc,

Brian
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