Re: [PATCH] Documentation: vm: Add 1GB large page support information

[Luiz Capitulino]

On Sat,  1 Nov 2014 01:01:57 +0900
Masanari Iida <standby24x7@xxxxxxxxx> wrote:

> This patch add 1GB large page support information on
> x86_64 architecture in Documentation/vm/hugetlbpage.txt.
> 
> Signed-off-by: Masanari Iida <standby24x7@xxxxxxxxx>
> ---
>  Documentation/vm/hugetlbpage.txt | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/vm/hugetlbpage.txt b/Documentation/vm/hugetlbpage.txt
> index bdd4bb9..0a2bf4f 100644
> --- a/Documentation/vm/hugetlbpage.txt
> +++ b/Documentation/vm/hugetlbpage.txt
> @@ -2,7 +2,8 @@
>  The intent of this file is to give a brief summary of hugetlbpage support in
>  the Linux kernel.  This support is built on top of multiple page size support
>  that is provided by most modern architectures.  For example, i386
> -architecture supports 4K and 4M (2M in PAE mode) page sizes, ia64
> +architecture supports 4K and 4M (2M in PAE mode) page sizes, x86_64
> +architecture supports 4K, 2M and 1G (SandyBridge or later) page sizes. ia64

Good catch, but does it make sense to mention SandyBridge? Doesn't it makes
it Intel specific? What about mentioning the pdpe1gb flag instead?

>  architecture supports multiple page sizes 4K, 8K, 64K, 256K, 1M, 4M, 16M,
>  256M and ppc64 supports 4K and 16M.  A TLB is a cache of virtual-to-physical
>  translations.  Typically this is a very scarce resource on processor.

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